Method for fabricating an electrostatic discharge protection circuit
AssigneeUnited Microelectronics Corp.
InventorJiann-Shin Lee
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Abstract
A process for fabricating ESD protection circuit has been developed, in which decreased cycle time has been achieved via a reduction in photomasking steps. The present invention process features the use of only one photo mask to form ESD protection circuit without the saliside and the LDD structure. The method of present invention needs only one mask instead of several masks as in a conventional process to create the ESD protection circuit during the salicide process of the MOSFET.
Claims10
A method for fabricating an electrostatic discharge (ESD) protection circuit on a silicon substrate that has defined gate, lightly-doped source and drain, heavily-doped source and drain, field oxide and sidewall spacers adjacent said gate in a MOSFET device region and in an electrostatic (ESD) protection circuit region, said method comprising the steps of:
- forming a metal layer on said silicon substrate;
- coating and defining a photo-resist mask on said metal layer in said MOSFET device region;
- etching unmasked portion of said metal layer to remove said metal layer in said ESD protection circuit region of said silicon substrate;
- removing said sidewall spacers adjacent said gate in said ESD protection circuit of said silicon substrate;
- stripping said photo-resist mask;
- using a rapid thermal process to form salicide;
- and
- removing said lightly-doped drain (LDD) in said ESD protection circuit region by implanting impurities in the ESD protection circuit region.
Dependencies are inferred from the claim text.