Method of making combined metal oxide semiconductor and junction field effect transistor device
AssigneeLSI Logic Corporation
InventorAshok K. Kapoor
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Abstract
An electrical circuit and method combine junction field effect transistors (JFET) and metal oxide semiconductor (MOS) circuits in series between V.sub.DD and ground, with a feedback of output voltage to control current from V.sub.DD to ground. The electrical circuit comprises a complementary metal oxide semiconductor (CMOS) inverter circuit with an input and an output, and a JFET having a gate coupled to the CMOS inverter for feedback to control the JFET. The JFET and CMOS circuitry is formed on a common substrate with the JFET gate junction being formed by implanting impurity dopants through a layer of gate oxide.
Claims3
A method of fabricating a JFET device on a substrate using metal oxide semiconductor processing steps, the method comprising the steps of:
- doping a portion of the substrate with an impurity material of a first conductivity type to form a channel region on the substrate;
- forming a layer of oxide on the substrate;
- depositing a conductive material on the layer of oxide to form a gate electrode;
- implanting the gate electrode with charged material of a second conductivity type such that the charged material is driven through the layer of oxide to form a semiconductor junction in the channel region and wherein the semiconductor junction has a diffusion region of the second conductivity type immediately contiguous with the layer of oxide;
- and
- forming a source diffusion region of the first conductivity type and a drain diffusion region of the first conductivity type on the substrate with the source and drain diffusion regions being laterally separated and connected by the channel region.
Dependencies are inferred from the claim text.