Method of manufacturing semiconductor device
AssigneeFujitsu Limited
InventorKoichi Hashimoto
Life of this patent
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Abstract
A method of manufacturing a semiconductor device of the present invention includes steps of introducing mixed gas containing CHF.sub.3 and CF.sub.4 in which a gas flow ratio of CF.sub.4 among CHF.sub.3 and CF.sub.4 is 30% or lower into an etching atmosphere, setting the pressure in the etching atmosphere to 1.2 Torr or lower and applying radio frequency electric power of 4 W/cm.sup.2 or more to a pair of electrodes, thereby to apply patterning with etching to an insulating film using a resist pattern as a mask.
Claims9
A method of manufacturing a semiconductor device comprising the steps of:
- providing a semiconductor substrate having an insulating film disposed thereupon;
- forming resist patterns on the insulating film;
- placing said insulating film between a pair of electrodes in an etching atmosphere;
- and
- introducing mixed gas containing CHF.sub.3 and CF.sub.4 in which a gas flow ratio of CHF.sub.3 is 30% or below among CHF.sub.3 and CF.sub.4 into said etching atmosphere, setting the pressure in said etching atmosphere to 1.2 Torr or lower, and applying radio frequency electric power at 4 W/cm.sup.2 or more to said pair of electrodes, thereby to apply patterning to said insulating film by etching using said resist patterns as a mask.
The method of manufacturing a semiconductor device comprising the steps of:
- providing a semiconductor substrate having an insulating film thereupon;
- forming a plurality of first resist patterns formed in a first region and a plurality of second resist patterns formed in a second region on said insulating film, said second region having a pattern density lower than that in said first region;
- applying patterning to said insulating film by etching said insulating film using said first resist patterns and said second resist patterns as a mask while preventing neutral species from attaching to said walls;
- thereby
- controlling the difference between a pattern size shift of the pattern of said insulating film existing under said first resist patterns and a pattern size shift of the pattern of said insulating film existing under said second resist patterns within 10% of the minimum pattern width.
Dependencies are inferred from the claim text.