US 5,665,987 AGranted

Insulated gate static induction thyristor with a split gate type shorted cathode structure

AssigneesToyo Denki Seizo Kabushiki Kaisha, Takashige Tamamushi

InventorsKimihiro Muraoka, Yoshinobu Ohtsubo, Toshio Higuchi, Makoto Iguchi, Takashige Tamamushi

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Abstract

In a gate insulated static induction thyristor with a split gate type shorted cathode structure, a first gate of the split gate structure is used as a cathode short-circuit gate and the cathode region is formed in the second gate. A MOS structure is formed on the second gate as a control gate electrode isolated therefrom. Since the channel integration density is high, the area efficiency increases. The MOS gate structure suppresses the minority carrier (hole) storage effect to permit high-speed swtching of the thyristor, and the shorted cathode structure provides for increased maximum controllable current/voltage durability. The split gate structure can be used in combination with planar, buried, recessed and double gate structures.

Claims19

Dependent claims

An insulated gate static induction thyristor with a split gate type shorted cathode structure, comprising an anode region, a cathode region and a control region formed in a high-resistivity layer, wherein:

said control region includes first and second gate regions split therefrom;
said cathode region is formed in said second gate region;
a channel region is formed in said high-resistivity layer which is surrounded by said first and second gate regions;
a shield gate electrode formed in contact with said first gate region and a cathode electrode formed in contact with said cathode region are electrically shorted to each other to form a shorted cathode structure;
an insulated gate control gate electrode is formed above said second gate region with an insulating layer interposed therebetween to form an essentially insulated gate transistor between said cathode region and said high-resistivity layer, a current flow through said channel region between said cathode region and said anode region being controlled by a voltage which is applied to said insulated gate control gate electrode;
a first depletion layer by the contact potential between said first gate region and said high-resistivity layer and a second depletion layer by the contact potential between said second gate region and said high-resistivity layer are formed in said high-resistivity layer near said cathode region, said first and second depletion layer essentially contact each other enabling a potential of said second gate region to be controlled by a potential of said first gate region;
a potential barrier which is controllable by a static induction effect is formed in said channel region and a height of said potential barrier is static inductively controlled by a voltage which is applied to said insulated gate control gate electrode,
holes injected from said anode region mainly flow through said first gate region and partly flow through said channel region and into said cathode electrode shorted to said shield gate electrode;
electrons injected from said cathode region mainly flow through said insulated gate transistor and said channel region;
an auxiliary cathode region of a same conductivity type as that of said cathode region is formed in a region of said high-resistivity layer which is surrounded by said first and second gate regions, and an essentially insulated gate transistor is formed between said auxiliary cathode region and said cathode by said second gate region and said insulated gate control gate electrode formed above said second gate region but isolated therefrom by said insulating layer;
and wherein electrons injected from said cathode region are stored in said auxiliary cathode region, and a potential barrier which is controlled by said static induction effect is formed in said high-resistivity layer adjoining said auxiliary cathode region by said first and second depletion layers spreading from said first and second gate regions.

8 more elements

An insulated gate static induction thyristor, comprising:

a high-resistivity layer;
an anode region formed in said high-resistivity layer;
a control region including first and second gate regions spaced from each other and formed in said high-resistivity layer;
a cathode region formed in said second gate region;
a channel region in said high-resistivity layer defined by and surrounded by said first and second gate regions;
a shield gate electrode formed in contact with said first gate region;
a cathode electrode formed in contact with said cathode region, said shield gate electrode and said cathode electrode are electrically shorted to each other to form a shorted cathode structure;
an insulated gate electrode formed above said second gate region with an insulating layer interposed between said insulated gate electrode to form an essentially insulated gate transistor between said cathode region and said high-resistivity layer, a current flow through said channel region between said cathode region and said anode region being controlled by a voltage which is applied to said insulated gate electrode;
a first depletion layer formed in said high-resistivity layer adjacent said cathode region by a contact potential between said first gate region and said high-resistivity layer, a second depletion layer formed in said high-resistivity layer adjacent said cathode region by another contact potential between said second gate region and said high-resistivity layer, said first and second gate regions being formed in said high-resistivity layer to cause said depletion layers to essentially contact each other and to enable a potential of said first gate region to control a potential of said second gate region;
said first and second gate regions, said cathode region, said anode region and said insulated gate electrode being formed to cause holes injected from said anode region to mainly flow through said first gate region and partly flow through said channel region and into said cathode electrode shorted to said shield gate electrode;
an auxiliary cathode region of a same conductivity type as that of said cathode region is formed in a region of said high-resistivity layer surrounded by said first and second gate regions, said auxiliary cathode region is formed to create an essentially insulated gate transistor between said auxiliary cathode region, said cathode by said second gate region and said insulated gate electrode, said auxiliary cathode region is also formed to cause electrons injected from said cathode region to be stored in said auxiliary cathode region and to cause a potential barrier controllable by a static induction effect to be formed in said channel region adjoining said auxiliary cathode region by said first and second depletion layers spreading from said first and second gate regions.

8 more elements

An insulated gate static induction thyristor, comprising:

a high-resistivity layer;
an anode region formed in said high-resistivity layer;
a control region including first and second gate regions spaced from each other and formed in said high-resistivity layer;
a cathode region formed in said second gate region;
a channel region in said high-resistivity layer defined by and surrounded by said first and second gate regions;
a shield gate electrode formed in contact with said first gate region;
a cathode electrode formed in contact with said cathode region, said shield gate electrode and said cathode electrode are electrically shorted to each other to form a shorted cathode structure;
an insulated gate electrode formed above said second gate region with an insulating layer interposed between said insulated gate electrode to form an essentially insulated gate transistor between said cathode region and said high-resistivity layer, a current flow through said channel region between said cathode region and said anode region being controlled by a voltage which is applied to said insulated gate electrode;
a first depletion layer formed in said high-resistivity layer adjacent said cathode region by a contact potential between said first gate region and said high-resistivity layer, a second depletion layer formed in said high-resistivity layer adjacent said cathode region by another contact potential between said second gate region and said high-resistivity layer, said first and second gate regions being formed in said high-resistivity layer to cause said depletion layers to essentially contact each other and to enable a potential of said first gate region to control a potential of said second gate region;
said first and second gate regions, said cathode region, said anode region and said insulated gate electrode being formed to cause holes injected from said anode region to mainly flow through said first gate region and partly flow through said channel region and into said cathode electrode shorted to said shield gate electrode;
an auxiliary cathode region of a same conductivity type as that of said cathode region is formed in a region of said high-resistivity layer surrounded by said first and second gate regions, said auxiliary cathode region is formed to create an essentially insulated gate transistor between said auxiliary cathode region and said cathode by said second gate region and said insulated gate electrode, said auxiliary cathode region is also formed to cause electrons injected from said cathode region to be stored in said auxiliary cathode region and to cause a potential barrier controllable by a static induction effect to be formed in said channel region adjoining said auxiliary cathode region by said first and second depletion layers spreading from said first and second gate regions, said insulated gate electrode being formed above said second gate region but isolated therefrom by said insulating layer;
said potential barrier is formed in said high-resistivity layer.

9 more elements

Dependencies are inferred from the claim text.