Method for manufacturing semiconductor device with low electric resistance silicide layer on silicon surface

A method for manufacturing a semiconductor device having a process of forming a crystalline silicide layer having relatively low electric resistance with a sheet resistance of less than or equal to about 3 ohms per unit area on a surface of a silicon layer, said processing comprising steps of:

• depositing a film of refractory metal on the surface of the silicon layer;
• subjecting said deposited film to a chemical reaction heat treatment at a reaction temperature to convert said film into a layer of silicide of refractory metal, said layer of silicide of refractory metal being a crystalline silicide layer having a relatively high electric resistance relative to said crystalline silicide layer having relatively low electric resistance;
• ion-implanting into said layer of silicide of refractory metal to generate damage therein, said damage being phase transition nuclei in at least one state selected from the group consisting of lattice vacancies and interstitials;
• and
• subjecting the layer of ion-implanted silicide to a phase transition treatment at a transition temperature higher than said chemical reaction temperature to convert said ion-implanted silicide layer into said crystalline silicide layer having relatively low electric resistance.