Method of irreversibly locking a portion of a semiconductor device
AssigneeSGS-Thomson Microelectronics S.A.
InventorsRichard Pierre Fournel, Serge Fruhauf, Fran.cedilla.ois Tailliet
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Abstract
A fuse for an integrated circuit is constituted by a shallow NP junction, covered with a metal contact, the semiconductor region being not excessively doped. For the blowing of the fuse, the junction is forward biased with a current sufficient to enable a diffusion of metal up to the junction. This short-circuits the junction. The detection is done also by the forward biasing of the junction, but with a low current or a low voltage. The detection can also be done with reverse biasing.
Claims18
A method of irreversibly locking a portion of a semiconductor device using only a supply voltage and ground voltage used in the semiconductor device, comprising the steps of:
- (i) forming in the semiconductor device an NP junction;
- (ii) forming on a surface of the semiconductor device, in contact with the NP junction a metallization layer;
- (iii) applying a bias current to the NP junction;
- (iv) comparing a voltage measured across the NP junction with a predetermined threshold voltage, to produce a locking signal output;
- and
- (v) irreversibly locking the portion of the semiconductor device, by applying a forward current at a low voltage for a duration of several seconds to the NP junction, the current producing a current density between the metallization layer and the NP junction to heat the metallization layer and the NP junction just sufficiently, to diffuse metal from the metallization layer into the NP junction and short-circuit the NP junction.
A method of irreversibly locking a portion of a semiconductor device using only a supply voltage and a ground voltage used in the semiconductor device, comprising the steps of:
- (i) forming on the semiconductor device an NP junction;
- (ii) forming on a surface of the semiconductor device, at the NP junction a metallization layer;
- (iii) applying a bias voltage to the NP junction, whereby an NP junction current is developed;
- (iv) mirroring the NP junction current into a resistor;
- (v) comparing a voltage measured across the resistor with a threshold, to produce a locking signal output;
- and
- (vi) irreversibly locking the portion of the semiconductor device, by applying a forward bias to the NP junction to diffuse metal from the metallization layer into the NP junction and short-circuit the NP junction.
A method of irreversibly locking a portion of a semiconductor device using only a supply voltage and ground voltage used in the semiconductor device, comprising the steps of:
- (i) forming in the semiconductor device an NP junction;
- (ii) forming on a surface of the semiconductor device, in contact with the NP junction a metallization layer of aluminum;
- (iii) applying a bias current to the NP junction;
- (iv) comparing a voltage measured across the NP junction with a predetermined threshold voltage, to produce a locking signal output;
- and
- (v) irreversibly locking the portion of the semiconductor device, by applying a forward current at a low voltage for a duration of several seconds to the NP junction, the current producing a current density between the metallization layer and the NP junction to heat the metallization layer and the NP junction just sufficiently, to diffuse aluminum from the metallization layer into the NP junction and short-circuit the NP junction.
A method of irreversibly locking a portion of a semiconductor device using only a supply voltage and ground voltage used in the semiconductor device, the semiconductor device including an NP junction having a metallization layer in contact therewith, comprising the steps of:
- (i) applying a bias current to the NP junction;
- (ii) comparing a voltage measured across the NP junction with a predetermined threshold voltage, to produce a locking signal output;
- and
- (iii) irreversibly locking the portion of the semiconductor device, by applying a forward current at a low voltage for a duration of several seconds to the NP junction, the current producing a current density between the metallization layer and the NP junction to heat the metallization layer and the NP junction just sufficiently, to diffuse metal from the metallization layer into the NP junction and short-circuit the NP junction.
Dependencies are inferred from the claim text.