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US 5,635,765 AGranted
Multi-layer gate structure
AssigneeCypress Semiconductor Corporation
InventorWilliam L. Larson
Life of this patent
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Abstract
A method of forming a multi-layer silicide gate structure for a MOS type semiconductor device that includes the processing steps of first providing a substrate, then depositing a gate oxide layer on the substrate, then depositing a first refractory metal silicide layer which has a first stoichometry on the gate oxide layer, and finally depositing a second refractory metal silicide layer which has a second stoichometry different than the first stoichometry on the first deposited refractory metal silicide layer.
Claims7
A multi-layer gate structure in a MOS type semiconductor device comprising:
- a substrate layer,
- a gate oxide layer,
- a first refractory metal silicide layer having a first stoichometry on said gate oxide layer, and
- a second refractory metal silicide layer having a second stoichometry different than said first stoichometry on said first refractory metal silicide layer.
1 more element
Dependencies are inferred from the claim text.