Method of forming P-type islands over P-type buried layer

A method of fabricating a vertical PNP transistor, the method comprising the steps of:

• (a) growing a first N type epitaxial layer on an N type substrate, said N type substrate having a P type buried layer therein;
• (b) implanting P type dopant into the first epitaxial layer over the buried layer, wherein a portion of the implant provides a P+ sinker section and another portion of the implant provides a P- collector section;
• (c) growing a second N type epitaxial layer on the first epitaxial layer;
• (d) implanting P type dopant into the second epitaxial layer over the P+ sinker section and the P- collector section to extend the P+ sinker section and the P- collector section to a top of the second epitaxial layer;
• and
• (e) growing further epitaxial layers that are each implanted as set forth in step (d) before a next one of the further epitaxial layers is grown, until a predetermined thickness of the P+ sinker section and the P- collector section is achieved.

A method of fabricating a vertical transistor, the method comprising the steps of:

• (a) growing a first layer of a first conductivity type less than approximately 2.5 microns thick on a first conductivity type substrate having a second conductivity type buried layer exposed on a surface thereof;
• (b) implanting a second conductivity type dopant into the first layer that joins an up-diffusing buried layer to form a vertical conductive region of the second conductivity type that extends to a top of the first layer;
• (c) growing a second layer of less than approximately 1.5 microns of the first conductivity type on the first layer;
• (d) implanting a second conductivity type dopant into the second layer that joins the vertical conductive region in the first layer so that the vertical conductive region extends to a top of the second layer;
• (e) growing a third layer of less than approximately 1.5 microns of the first conductivity type on the second layer;
• and
• (f) implanting a second conductivity type dopant into the third layer that joins the vertical conductive region in the second layer so that the vertical conductive region extends to a top of the third layer.

A method of fabricating a vertical PNP transistor having a sinker and a collector including the steps of:

• (a) providing a N type substrate having a P type buried layer therein;
• (b) sequentially growing thereatop plural N type epitaxial layers;
• and
• (c) after growing each one of the epitaxial layers, implanting a P type sinker section and a P type collector section over the buried layer,
• whereby each of the sinker and collector sections from each one of the layers join with ones of the sinker and collector sections from the layers adjacent thereto to form the sinker and collector of the PNP transistor capable of high-voltage, fast operation in a GHz range.

A method of fabricating a vertical NPN transistor having a sinker and a collector including the steps of:

• (a) providing a P type substrate having an N type buried layer therein;
• (b) sequentially growing thereatop plural P type epitaxial layers;
• and
• (c) after growing each one of the epitaxial layers, implanting an N type sinker section and an N type collector section over the buried layer,
• whereby each of the sinker and collector sections from each one of the layers join with ones of the sinker and collector sections from the layers adjacent thereto to form the sinker and collector of the NPN transistor capable of high-voltage, fast operation in a GHz range.