Method for producing a semiconductor gate conductor having an impurity migration barrier
AssigneeAdvanced Micro Devices, Inc.
InventorMohammed Anjum
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AssigneeAdvanced Micro Devices, Inc.
InventorMohammed Anjum
Estimating the term…
A PMOS device is provided having a diffusion barrier placed within the polysilicon gate. The diffusion barrier is purposefully deposited to a concentration peak density within the gate which is deeper than subsequently placed impurity dopant. The barrier comprises germanium atoms placed in fairly close proximity to one another within the gate conductor, and the impurity dopant comprises an ionized compound of BF.sub.2 subsequently placed as boron within the gate and source/drain region, at least a majority and preferably greater than eighty percent of which are placed shallower within the gate than the germanium atoms. The barrier region substantially prevents or retards penetration of boron atoms through the gate oxide and into the channel region. Thus, the barrier helps prevent change in channel concentration and problems associated with boron penetration such as flatband voltage (Vfb) and threshold voltage (Vth) shift.
A method for reducing diffusion of dopant from a patterned semiconductor gate conductor to an underlying channel region, the method comprising the steps of:
A method for reducing diffusion of boron dopant from a patterned semiconductor gate conductor to an underlying n- type channel region, the method comprising:
A method for producing a boron dopant diffusion barrier in a semiconductor gate conductor, the method comprising the steps of:
Dependencies are inferred from the claim text.