Compounded power MOSFET
AssigneeHitachi, Ltd.
InventorsKozo Sakamoto, Shigeo Otaka, Kyouichi Takagawa
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AssigneeHitachi, Ltd.
InventorsKozo Sakamoto, Shigeo Otaka, Kyouichi Takagawa
Estimating the term…
Provided is a compounded power MOSFET which has a high positive and negative withstand voltages for the drain terminal relative to the source terminal, and can be formed on a single chip based on the conventional fabrication process of power MOSFETs. Power MOSFETs 10 and 11 have their drains connected together, the MOSFET 10 has its source and gate used for the source terminal 0 and gate terminal 1, respectively, of the compounded power MOSFET 60, and the MOSFET 11 has its source used for the drain terminal 2. The compounded power MOSFET includes a voltage comparator 50 which drives the MOSFET 11 to turn off when the terminal 2 has a negative voltage, and a voltage transmitter 51 which is connected between the terminal 1 and the gate of the MOSFET 11 to block a current flowing from the terminal 2 to the terminal 1 by way of the circuit 50 and transfer the voltage of the terminal 1 to the gate of the MOSFET 11. The positive withstand voltage is provided by the MOSFET 10, and the negative withstand voltage is provided by the MOSFET 11.
A compounded power MOSFET comprising a first MOSFET and a second MOSFET, with the drains of the MOSFETs being connected together, with the source of the first MOSFET being used for the source terminal, with the source of the second MOSFET being used for the drain terminal, and with the gate of the first MOSFET being used for the gate terminal of the compounded power MOSFET, characterized in that said compounded power MOSFET includes means of negative voltage drive which turns off the second MOSFET during the period when the voltage of the drain terminal is negative relative to the voltage of the source terminal, and means of input voltage transmission which blocks a current flowing from the drain terminal to the gate terminal by way of said negative voltage drive means and turns on the second MOSFET in response to the input voltage signal applied to the gate terminal.
Dependencies are inferred from the claim text.