Semiconductor device

A semiconductor device having a plurality of basic cells fabricated on a device formation region formed on a semiconductor substrate in a same column of a grid, each of said basic cells comprising:

• a first pair of first conductivity-type field effect transistors formed adjacently to each other on a P-channel region of said device formation region;
• a second pair of first conductivity-type field effect transistors formed adjacently to each other on said P-channel region, and formed next to said first pair of first conductivity-type field effect transistors in a first direction;
• a first pair of second conductivity-type field effect transistors formed adjacently to each other, and aligned next to said first pair of first conductivity-type field effect transistors in a second direction;
• a second pair of second conductivity-type field effect transistors formed adjacently to each other, and formed next to said first pair of second conductivity-type field effect transistors in said first direction;
• a third pair of second conductivity-type field effect transistors formed adjacently to each other, and aligned next to said first pair of first conductivity-type field effect transistors and to said first pair of second conductivity-type field effect transistors in a second direction;
• a bipolar transistor formed between said first pair of first conductivity-type field effect transistors and said second pair of first conductivity-type field effect transistors;
• a well contact region formed between said first pair of first conductivity-type field effect transistors and said second pair of first conductivity-type field effect transistors and located adjacent to said bipolar transistor in said second direction such that a first region between said first pair of first conductivity-type field effect transistors and said second pair of first conductivity-type field effect transistors is shared by said well contact region and said bipolar transistor;
• a resistance formed between said first pair of second conductivity-type field effect transistors and said second pair of second conductivity-type field effect transistors;
• a sub-contact region formed between said first pair of second conductivity-type field effect transistors and said second pair of second conductivity-type field effect transistors and located adjacent to said resistance in said second direction such that a second region between said first pair of second conductivity-type field effect transistors and said second pair of second conductivity-type field effect transistors is shared by said resistance and said sub-contact region;
• element insulation means disposed between said first pair of first conductivity-type field effect transistors and said second pair of first conductivity-type field effect transistors on said P-channel region, for isolating electrically said first pair of first conductivity-type field effect transistors from said second pair of first conductivity-type field effect transistors,
• wherein a source or a drain region of one of said first pair of first conductivity-type field effect transistors is formed in a same diffusion layer as a base region of said bipolar transistor,
• wherein said bipolar transistor is formed adjacent to said element insulation means, said bipolar transistor further being isolated electrically from said second pair of first conductivity-type field effect transistors,
• wherein an impurity concentration of said base region of said bipolar transistor is lower than an impurity concentration of a source region or a drain region of said one of said first pair of first conductivity-type field effect transistors, and
• wherein said well contact region also serves as a collector electrode of said bipolar transistor.

A semiconductor device having a plurality of basic cells fabricated on a device formation region formed on a semiconductor substrate in a same column of a grid, each of said basic cells comprising:

• a well region of a first conductivity type formed on said semiconductor substrate;
• a first pair of second conductivity-type field effect transistors formed adjacent to each other, said first pair of second conductivity-type field effect transistors having a first diffusion layer region of said second conductivity type formed in said well region of said first conductivity type, wherein said first diffusion layer region operates as one of a source and a drain of said first pair for second conductivity-type field effect transistors;
• a second pair of second conductivity-type field effect transistors formed adjacent to each other and formed next to said first pair of second conductivity-type field effect transistors in a first direction, said second pair of second conductivity-type field effect transistors having a second diffusion layer region of said second conductivity type formed in said well region of said first conductivity type, wherein said second diffusion layer region operates as one of a source and a drain for said second pair of second conductivity-type field effect transistors;
• a third pair of second conductivity-type field effect transistors formed adjacent to each other, said third pair of second conductivity-type field effect transistors having a third diffusion layer region of said second conductivity type formed in said well region of said first conductivity type, wherein said third diffusion layer region operates as one of a source and a drain of said first pair of second conductivity-type field effect transistors;
• a first pair of first conductivity-type field effect transistors formed adjacent to each other, and formed next to said first pair of first conductivity-type field effect transistors in a second direction;
• a second pair of first conductivity-type field effect transistors formed adjacent to each other, and formed next to said first pair of second conductivity-type field effect transistors in said first direction;
• a bipolar transistor formed between said first pair of second conductivity-type field effect transistors and said second pair of second conductivity-type field effect transistors, said bipolar transistor including,
• a base region of said second conductivity type formed adjacent to and contiguous with said first diffusion layer region of said second conductivity type, an impurity concentration of said base region being lower than an impurity concentration of said first diffusion layer region,
• an emitter region of said first conductivity type formed in said base region, and
• a collector region formed as part of said well region;
• and
• a well contact region formed between said first pair of first conductivity-type field effect transistors and said second pair of first conductivity-type field effect transistors and located adjacent to said bipolar transistor in said second direction such that a first region between said first pair of first conductivity-type field effect transistors and said second pair of first conductivity-type field effect transistors is shared by said well contact region and said bipolar transistor;
• a resistance formed between said first pair of second conductivity-type field effect transistors and said second pair of second conductivity-type field effect transistors;
• a sub-contact region formed between said first pair of second conductivity-type field effect transistors and said second pair of second conductivity-type field effect transistors and located adjacent to said resistance in said second direction such that a second region between said first pair of second conductivity-type field effect transistors and said second pair of second conductivity-type field effect transistors is shared by said resistance and said sub-contact region;
• element insulation means disposed between said base region of said bipolar transistor and said second pair of second conductivity-type field effect transistors, for isolating electrically said second pair of second conductivity-type field effect transistors from said second pair of second conductivity-type field effect transistors,
• wherein said well contact region also serves as a collector electrode of said bipolar transistor.