Vertical channel device having buried source

Abstract

A structure is provided comprising a semiconductor substrate having a first conductivity type, a buried source region having a second opposite conductivity type, and an epitaxial layer of the second conductivity type having a lower dopant concentration than the buried source region. Field oxide regions are formed at outer edges of the epitaxial layer. A well region of first conductivity type is implanted into the central portion of the epitaxial layer to define the active area. Trenches are etched through the well region into the buried source region. A first layer of silicon oxide is grown on the surface and within the trenches. Gate electrodes are formed by depositing a layer of polysilicon and etching back to leave the polysilicon layer only within the trenches. Ions of second conductivity type are implanted into the top portion of the well region to form drain regions. A second layer of silicon oxide is deposited over the top surfaces and planarized. Contact trenches are etched through the second silicon oxide layer and the field oxide regions to connect to the buried source region. A second set of contact trenches are etched through portions of the second silicon oxide layer to the underlying drain regions. A layer of tungsten is deposited and etched back leaving the tungsten within the first and second trenches. Interconnections are made between the source and drain regions to complete the fabrication.

Dependencies are inferred from the claim text.