Flash EEPROM memory with improved discharge speed using substrate bias and method therefor

A floating gate memory device comprising:

• an array of memory cells formed at least in part in a core semiconductor region of a predetermined conductivity type;
• and
• a control circuit for selectively charging, discharging and generating indicia of a charge state of each of the cells of the array;
• each cell comprising
• first and second semiconductor regions of a conductivity type opposite the conductivity type of the core region,
• a channel semiconductor region of the same conductivity type as the core region, and
• a selectively chargeable gate structure including a first dielectric overlying the channel region, a floating gate overlying the first dielectric and a control gate,
• the first, second and channel semiconductor regions being formed in the core region, with the first and second semiconductor regions defining a controlled current path through the channel region which tends to be rendered conductive in response to a voltage greater than a gate threshold level being applied to the control gate;
• the gate threshold level being a function of the charge state of the floating gate, such that conduction of the cell in response to application to the control gate of a predetermined voltage is indicative of the logical state of the cell, and
• the cell being dischargeable by movement of electrons from the floating gate through the first dielectric to the first semiconductor region to remove the charge on the floating gate;
• the control circuit composing a circuit for effecting selective discharge of the cell by, during discharge operations only, selectively applying a first predetermined positive voltage to the first semiconductor region, a high impedance to the second semiconductor region, a first predetermined negative voltage to the selectively chargeable gate structure, and a second predetermined negative voltage to the core semiconductor region;
• whereby, during discharge operations only, hot holes are injected from the channel region through the first dielectric to the floating gate to increase the rate of discharge of the cell.