Synchronous detector and methods for synchronous detection

A synchronous detector for recovering an output signal at a detector output terminal from a modulated carrier signal at a detector input terminal, the detector comprising:

• first and second mixer circuits, each mixer circuit having first and second mixer inputs and a mixer output, the detector input terminal being coupled to the first mixer input of each of the first and second mixer circuits, the first mixer circuit providing a first mixer output signal, the second mixer circuit providing a second mixer output signal characterized by a second mixer output phase response;
• a phase transformer having a transformer output coupled to the second mixer input of the first mixer circuit and having a transformer input coupled to the second mixer input of the second mixer circuit;
• an oscillator having an oscillator output coupled to the transformer input;
• combiner circuitry having first and second combiner inputs and a combiner output, the first combiner input being coupled to the detector output terminal and coupled to the mixer output of the first mixer circuit, the second combiner input being coupled to the mixer output of the second mixer circuit;
• and
• a loop filter having a loop filter input coupled to the combiner output and having a loop filter output coupled to the oscillator input, the loop filter being characterized by a loop filter bandwidth,
• wherein the combiner circuitry processes the first mixer output signal to produce a filter output signal, the filter output signal being characterized by a filter phase response, the filter phase response being substantially out of phase with the second mixer output phase response at frequencies within the loop filter bandwidth, the combiner circuitry combining the filter output signal and the second mixer output signal so that the filter output signal at least partially cancels the second mixer output signal at frequencies within the loop filter bandwidth.

In a synchronous detector having a partial phase-locked loop circuit that incorporates an oscillator and first and second mixers in quadrature relationship therein, a canceler circuit cooperating with the partial phase-locked loop circuit to form a phase-locked loop circuit, the canceler circuit comprising:

• a filter coupled to an output of the first mixer;
• and
• a summer coupled to an output of the filter and directly connected to an output of the second mixer, the summer having a summer output coupled to the oscillator of the partial phase-locked loop circuit,
• wherein the phase-locked loop circuit is characterized by a loop bandwidth,
• wherein the filter produces a filter output signal characterized by a filter phase response,
• wherein the second mixer provides a second mixer output signal characterized by a second mixer output phase response, the filter phase response being substantially out of phase with the second mixer output phase response at frequencies within the loop bandwidth, and
• wherein the summer combines the filter output signal and the second mixer output signal so that the filter output signal at least partially cancels the second mixer output signal at frequencies within the loop bandwidth.

A method for synchronous detection of a modulated input signal to produce a demodulated output signal, the method comprising steps of:

• generating, based on a control signal, a local oscillator signal and a phase transformed signal, the control signal being a signal characterized by frequencies within a loop bandwidth;
• mixing the phase transformed signal with the modulated input signal to produce a first mixed output signal, the first mixed output signal being the demodulated output signal;
• mixing the local oscillator signal with the modulated input signal to produce a second mixed output signal characterized by a second mixed output phase response;
• filtering the first mixed output signal to produce a filter output signal characterized by a filter phase response, the filter phase response being substantially out of phase with the second mixed output phase response at frequencies within the loop bandwidth;
• summing the filter output signal and the second mixed output signal to produce a summed signal so that the filter output signal at least partially cancels the second mixed output signal at frequencies within the loop bandwidth;
• and
• filtering the summed signal to produce the control signal.

In a synchronous detector having a canceler circuit cooperating with a partial phase-locked loop circuit to form a phase-locked loop circuit, the partial phase-locked loop circuit incorporating an oscillator and first and second mixers in quadrature relationship therein, a method of canceling phase jitter at frequencies within a loop bandwidth in the phase-locked loop circuit, the method comprising steps of:

• filtering an output signal from the first mixer to produce a filtered signal;
• and
• summing within the loop bandwidth the filtered signal with an output signal from the second mixer to produce a phase jitter canceled signal coupled to the oscillator,
• wherein the second mixer provides a second mixer output signal characterized by a second mixer output phase response,
• wherein the filtered signal is characterized by a filter phase response, the filter phase response being substantially out of phase with the second mixer output phase response at frequencies within the loop bandwidth, and
• wherein the step of summing includes summing the filtered signal and the output signal from the second mixer so that the filtered signal at least partially cancels the output signal from the second mixer at frequencies within the loop bandwidth.