Power level detection circuit

A level detection circuit for producing an detection output when an input signal reaches a predetermined level, said detection circuit including:

• voltage reference circuit means for producing a reference voltage having a magnitude which is relatively independent of the input signal magnitude at least once the input signal has reached a first operating voltage;
• translator circuit means for producing a translated voltage having a magnitude which is indicative of the magnitude of the input signal, with the translator circuit means being powered by the input signal;
• comparator means for comparing the reference voltage and the translated voltage and for producing a comparator output based upon the comparison, with the comparator output changing from a first state to a second state based upon relative magnitudes of the reference voltage and translated voltage, with the comparator means being powered by the input signal;
• and
• outputting means for producing the detection output signal in response to the comparator output, with the outputting means being powered by the input signal and with the outputting means producing a first component of the output signal prior to the comparator output changing from the first state to the second state which is indicative of the input signal magnitude and producing a second component of the output signal in a form of a pulse having a duration greater than a predetermined minimum duration subsequent to the comparator output changing from the first state to the second state.

A level detection circuit for producing an detection output when an input signal reaches a predetermined level, said detection circuit including:

• voltage reference circuit means for producing a reference voltage having a magnitude which is relatively independent of the input signal magnitude at least once the input signal has reached a first operating voltage, with the reference voltage being equal to the gate-source voltage an MOS transistor having a gate and drain connected together, with the voltage reference circuit means including a resistor connected in series with the MOS transistor, intermediate the MOS transistor and a node where the input signal is applied, and a capacitor coupled between a junction of the resistor and the MOS transistor and a circuit common;
• translator circuit means for producing a translated voltage having a magnitude which is indicative of the magnitude of the input signal;
• comparator means for comparing the reference voltage and the translated voltage and for producing a comparator output based upon the comparison, with the comparator means being powered by the input signal;
• and
• outputting means for producing the detection output signal in response to the comparator output.

A level detection circuit for producing a detection output when an input signal reaches a predetermined level, said detection circuit including:

• voltage reference circuit means for producing a reference voltage having a magnitude which is relatively independent of the input signal magnitude at least once the input signal has reached a first operating voltage;
• translator circuit means for producing a translated voltage having a magnitude which is indicative of the magnitude of the input signal and including a first N channel transistor having its drain-source connected between the input signal and a translator circuit means output where the translated voltage is produced and including a resistor connected between the translator circuit means output and a circuit common and a capacitor coupled between the translator circuit means output and the circuit common;
• comparator means for comparing the reference voltage and the translated voltage and for producing a comparator output based upon the comparison, with the comparator means being powered by the input signal and with the comparator means changes from a first state to a second when the input is at a first level and from the second state to the first state when the input is at the second level;
• outputting means for producing the detection output signal in response to the comparator output;
• and
• feedback means for generating a feedback signal in response to the comparator output which causes the first level to differ from the second level and wherein the input voltage is a positive voltage with respect to the circuit common and the feedback means causes the input signal second level to be at a voltage different than the input signal at the first level.

A level detection circuit for producing a detection output when an input signal reaches a predetermined level, said detection circuit being switchable between an enabled mode and a disabled mode of operation in response to an enable signal and including:

• voltage reference circuit means for producing a reference voltage having a magnitude which is relatively independent of the input signal magnitude at least once the input signal has reached a first operating voltage;
• translator circuit means for producing a translated voltage having a magnitude which is indicative of the magnitude of the input signal, with the translator circuit means including an MOS transistor connected such that the translated voltage differs from the input signal voltage by the drain-source voltage of the MOS transistor and wherein the MOS transistor switches between a conductive and non-conductive state in response to the enable signal;
• comparator means for comparing the reference voltage and the translated voltage and for producing a comparator output based upon the comparison, with the comparator means being powered by the input signal;
• and
• outputting means for producing the detection output signal in response to the comparator output.

A level detection circuit for producing an detection output when an input signal reaches a predetermined level, said detection circuit being switchable between an enabled mode of operation and a disabled mode of operation in response to an enable signal and including:

• voltage reference circuit means for producing a reference voltage having a magnitude which is relatively independent of the input signal magnitude at least once the input signal has reached a first operating voltage, with the voltage reference circuit being powered by the input signal and including a first P channel MOS transistor, with the reference voltage being derived from a threshold voltage of the first MOS transistor;
• translator circuit means for producing a translated voltage having a magnitude which is indicative of the magnitude of the input signal, with the translator circuit means being powered by the input signal and including a second N channel MOS transistor and wherein the translated voltage differs from the input signal voltage by the drain-source voltage of the second MOS transistor, with the second MOS transistor switches between a conductive state and a non-conductive state in response to the enable signal;
• comparator means for comparing the reference voltage and the translated voltage and for producing a comparator output based upon the comparison, with the comparator means being powered by the input signal, with the comparator means including a pair of differentially-connected P channel MOS transistors having their gates connected to receive the translated voltage and the reference voltage, respectively and a pair of pair of N channel MOS transistors connected with respect to the pair of P channel transistors so as to form a current mirror load;
• and
• outputting means for producing the detection output signal in response to the comparator output, with the outputting means being powered by the input signal.