Voltage controlled phase shifter with unlimited range

A phase shift apparatus for producing an output signal that varies in phase from an input signal by a predetermined phase difference in response to a control voltage, the phase shift apparatus comprising:

• a first delay circuit coupled to receive the input signal, the first delay circuit for outputting a first intermediate signal that is .alpha. degrees out of phase with the input signal, a second intermediate signal that is .beta. degrees out of phase with the first intermediate signal, a third intermediate signal that is 180 degrees out of phase with the first intermediate signal, and a fourth intermediate signal that is 180 degrees out of phase with the second intermediate signal;
• a phase interpolator circuit coupled to receive a control voltage signal and the first, second, third and fourth intermediate signals, the phase interpolator for phase mixing a selected pair of the first, second, third and fourth intermediate signals in response to the control voltage signal to produce the output signal such that an output vector representative of the output signal is a sum of fractions of vectors representative of each selected intermediate signal of the selected pair;
• and
• a phase selector circuit coupled to the phase interpolator circuit and coupled to receive a phase slope signal and the control voltage signal, the phase selector circuit for selecting the selected pair in response to the phase slope signal and the control voltage signal such that the output signal varies in phase from the input signal by the predetermined phase difference, wherein the phase selector circuit includes:
• a quadrant boundary detector for outputting a MAX signal when the control voltage is at a maximum voltage level and a MIN signal when the control voltage is at a minimum voltage level, the MAX and MIN signals indicating when a weighted fraction for a selected intermediate signal of the first selected pair is equal to zero;
• a phase selector state machine coupled to receive the MAX signal, the MIN signal and the phase slope signal, the phase selector for selecting the selected pair in response to the MAX signal, the MIN signal and the phase slope signal by asserting as active two of a plurality of select signals, said plurality of select signals including an ISEL signal, an ISELB signal, a QSEL signal and a QSELB signal.

A phase shift apparatus for producing an output signal that varies in phase from an input signal by a predetermined phase difference in response to a control voltage, the phase shift apparatus comprising:

• a delay circuit coupled to receive the input signal, the delay circuit for outputting a first intermediate signal, a second intermediate signal that is 90 degrees out of phase with the first intermediate signal, a third intermediate signal that 180 degrees out of phase with the first intermediate signal, and a fourth intermediate signal that is 270 degrees out of phase with the first intermediate signal, the delay circuit including a frequency divider circuit for dividing an input frequency of the input signal in half such that a intermediate frequency of the first, second, third and fourth intermediate signals is equal to half of the input frequency;
• a first phase interpolator circuit coupled to receive a control voltage signal and the first, second, third and fourth intermediate signals, the first phase interpolator for phase mixing a first selected pair of the first, second, third and fourth intermediate signals in response to the control voltage signal to produce a first output signal such that an output vector representative of the first output signal is a sum of fractions of vectors representative of each selected intermediate signal of the first selected pair;
• a second phase interpolator circuit coupled to receive a control voltage signal and the first, second, third and fourth intermediate signals, the second phase interpolator for phase mixing a second selected pair of the first, second, third and fourth intermediate signals in response to the control voltage signal to produce a second output signal that is 90 degrees out of phase with the first output signal such that a phase of the second output signal is a sum of weighted fractions of each phase of the selected intermediate signals of the second selected pair;
• a frequency doubler circuit coupled to receive the first output signal and the second output signal, the frequency doubler circuit for generating the output signal in response to the first and second output signals, the output signal having an output frequency equal to the input frequency;
• and
• a phase selector circuit coupled to the first phase interpolator circuit and coupled to receive a phase slope signal and the control voltage signal, the phase selector circuit for selecting the first and second selected pairs in response to the phase slope signal and the control voltage signal such that the output signal varies in phase from the input signal by the predetermined phase difference, wherein the phase selector circuit includes:
• a quadrant boundary detector for outputting a MAX signal when the control voltage is at a maximum voltage level and a MIN signal when the control voltage is at a minimum voltage level, the MAX and MIN signals indicating when a weighted fraction for a selected intermediate signal of the first selected pair is equal to zero;
• a phase selector state machine coupled to receive the MAX signal, the MIN signal and the phase slope signal, the phase selector for selecting the selected pair in response to the MAX signal, the MIN signal and the phase slope signal by asserting as active two of a plurality of select signals, said plurality of select signals including an ISEL signal, an ISELB signal, a QSEL signal and a QSELB signal.

A phase shift circuit comprising:

• a differential amplifier including a pair of inputs and a pair of outputs, the pair of inputs being coupled to receive differential control voltage VC- and VC+;
• a phase mixer including a first pair of inputs coupled to the outputs of the differential amplifier, a second pair of inputs coupled to a pair of quadrature signals, a first output, and a second output, the phase mixer providing current supplied by the outputs of the differential amplifier to the first and second outputs in response to the pair of quadrature signals;
• a first capacitive element coupled between ground and the first output of the phase mixer;
• a second capacitive element coupled between ground the second output of the phase mixer;
• and
• a comparator having a first input coupled to the first output of the phase mixer and a second input coupled to the second output of the phase mixer, wherein the comparator outputs a phase shifted signal in response to the first and second capacitive elements being charged and discharged by the phase mixer.