Personalizable multi-chip carrier including removable fuses
AssigneeQuick Technologies Ltd.
InventorsMeir I. Janai, Zvi Orbach
Life of this patent
Estimating the term…
Abstract
A personalizable multi-chip carrier including a substrate, first and second pluralities of conductors arranged on respective first and second parallel planes, the first and second pluralities of conductors defining a grid of conductors arranged over the substrate and defining a multiplicity of crossing locations at which conductors of the first and second pluralities cross each other, apparatus for interconnecting the first and second pluralities of conductors at locations adjacent the multiplicity of crossing locations and including a plurality of fusible links.
Claims5
A personalizable multi-chip carrier comprising:
- a substrate;
- first and second pluralities of conductors arranged on respective first and second parallel planes, said first and second pluralities of conductors defining a grid of conductors arranged over said substrate and defining a multiplicity of crossing locations at which conductors of said first and second pluralities cross each other;
- means for interconnecting said first and second pluralities of conductors at locations adjacent said multiplicity of crossing locations;
- a first selectably removable fuse formed on at least one of said first and second pluralities of conductors adjacent each of said multiplicity of crossing locations;
- a first plurality of chip connection pads located alongside at least one of said first and second plurality of conductors;
- a first plurality of electrical connectors connecting each of said first plurality of chip connection pads to a third plurality of conductors forming part of said grid of conductors;
- a second selectably removable fuse between each of said first plurality of electrical connectors and each of said first plurality of chip connection pads;
- a first plurality of lead connection pads adjacent at least one of said first and second pluralities of conductors;
- and
- a second plurality of electrical connectors connecting each of said first plurality of lead connection pads to a fourth plurality of conductors forming part of said grid of conductors.
A multi-chip module comprising:
- a substrate;
- first and second pluralities of conductors arranged on respective first and second parallel planes, said first and second pluralities of conductors defining a grid of conductors arranged over said substrate and defining a multiplicity of crossing locations at which conductors of said first and second pluralities cross each other;
- means for interconnecting said first and second pluralities of conductors at locations adjacent said multiplicity of crossing locations;
- a first selectably removable fuse formed on at least one of said first and second pluralities of conductors adjacent each of said multiplicity of crossing locations;
- a first plurality of chip connection pads located alongside at least one of said first and second plurality of conductors;
- a first plurality of electrical connectors connecting each of said first plurality of chip connection pads to a third plurality of conductors forming part of said grid of conductors;
- a second selectably removable fuse between each of said first plurality of electrical connectors and each of said first plurality of chip connection pads;
- a plurality of chips bonded to said substrate in electrical connection with said first plurality of chip connection pads;
- packaging partially surrounding said multi-chip carrier and said plurality of chips;
- a first plurality of lead connection pads adjacent at least one of said first and second pluralities of conductors;
- and
- a second plurality of electrical connectors connecting each of said first plurality of lead connection pads to a fourth plurality of conductors forming part of said grid of conductors.
Dependencies are inferred from the claim text.