Semiconductor device for protecting an internal circuit from electrostatic damage

A semiconductor device comprising an input/output terminal, a first terminal for providing a first electrical potential, and a second terminal for providing a second electrical potential which is lower than the first electrical potential,

• wherein the device further comprises:
• a first p-channel MOS transistor having a drain connected to the input/output terminal, a source connected to the first terminal, and a gate electrode to be electrically connected to the second terminal;
• and
• switching means for switching between an electrically conductive state and a non-conductive state between the drain and the gate electrode of the first p-channel MOS transistor, the means forming the electrically conductive state between the drain and the gate electrode of the first p-channel MOS transistor, in a case where a surge voltage higher than the second electrical potential is applied to the input/output terminal, and an electrical potential difference between the drain and the gate electrode of the first p-channel MOS transistor exceeds a predetermined voltage lower than a breakdown voltage of the gate oxide of the first p-channel MOS transistor.

A semiconductor device comprising an input/output terminal, a first terminal for providing a first electrical potential, and a second terminal for providing a second electrical potential which is lower than the first electrical potential,

• wherein the device further comprises:
• a first n-channel MOS transistor having a drain connected to the input/output terminal, a source connected to an internal circuit, and a gate electrode to be electrically connected to the first terminal;
• and
• first switching means for switching between an electrically conductive state and a non-conductive state between the drain and the gate electrode of the first n-channel MOS transistor, the means forming the electrically conductive state between the drain and the gate electrode of the first n-channel MOS transistor, in a case where a surge voltage lower than the first electrical potential is applied to the input/output terminal, and an electrical potential difference between the drain and the gate electrode of the first n-channel MOS transistor exceeds a predetermined voltage lower than a breakdown voltage of the gate oxide of the first n-channel MOS transistor.

A semiconductor device comprising an input/output terminal, a first terminal for providing a first electrical potential, and a second terminal for providing a second electrical potential which is lower than the first electrical potential,

• wherein the device further comprises:
• a first p-channel MOS transistor having a drain connected to the input/output terminal, a source connected to an internal circuit, and a gate electrode to be electrically connected to the first terminal;
• and
• switching means for switching between an electrically conductive state and a non-conductive state between the drain and the gate electrode of the first p-channel MOS transistor, the means forming the electrically conductive state between the drain and the gate electrode of the first p-channel MOS transistor, in a case where a surge voltage higher than the second electrical potential is applied to the input/output terminal, and an electrical potential difference between the drain and the gate electrode of the first p-channel MOS transistor exceeds a predetermined voltage lower than a breakdown voltage of the gate oxide of the first p-channel MOS transistor.

A semiconductor device comprising an input/output terminal, an internal circuit connected to the input/output terminal, a first terminal for providing a first electrical potential, and a second terminal for providing a second electrical potential which is lower than the first electrical potential,

• wherein the device further comprises:
• first protection means connected between the input/output terminal and the internal circuit, the first protection means guiding surge charges applied to the input/output terminal to the first terminal or the second terminal, thereby lowering an electrical potential due to the surge charges;
• and
• auxiliary protection means connected between the first protection means and the internal circuit, and further lowering the electrical potential due to the surge charges, the auxiliary protection means including a first electronic element connected to at least one of the first terminal and the second terminal, a first protection resistor provided between the first electronic element and the first protection means, and a second protection resistor provided between the first electronic element and the internal circuit,
• wherein a resistance of the second protection resistor is in a range between half of a total resistance of the first protection resistor and the second protection resistor,
• and nine-tenths of the total resistance of the first protection resistor and the second protection resistor.