Process for plasma etching of vias
AssigneeApplied Materials, Inc.
InventorsHongching Shan, Robert Wu
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AssigneeApplied Materials, Inc.
InventorsHongching Shan, Robert Wu
Estimating the term…
Disclosed is a process for plasma etching a mask patterned dielectric film to form vias on a semiconductor wafer, so that the resulting etched structure is devoid of residues on the walls of the structure. A via is an opening through a dielectric material through which a point of contact of underlying metal with a metal film deposited over the dielectric is made. The underlying metal, when exposed to plasma, has a tendency to sputter onto the vertical wall portions of the contact via structures. The metal-containing sputtered material forms a residue that essentially cannot be removed in the subsequent photoresist stripping process typically used in semiconductor manufacturing. The plasma etch process in accordance with the invention enables removal of the sputtered metal by utilizing with the basic dielectric etch gases a gas that reacts with the metal to form volatile compounds which are readily evacuable.
A method for etching vias within a patterned dielectric film positioned over an underlying film of metal, comprising the steps of:
A method for etching vias in a dielectric layer of a substrate which also includes metal underlying the dielectric layer, comprising the steps of:
A method of etching vias in a dielectric layer of a substrate which also includes metal underlying the dielectric layer and in which the dielectric layer has been provided with a mask pattern defining the desired positions of the vias, the method comprising the steps of:
Dependencies are inferred from the claim text.