Semiconductor integrated circuit device having elements of different switching speeds integrated on a single chip

A semiconductor integrated circuit device comprising:

• a semiconductor substrate;
• a first element formed in the semiconductor substrate and having a first current path in a first portion of the semiconductor substrate;
• a second element formed in the semiconductor substrate separated from the first element and having a second current path in a second portion of the semiconductor substrate;
• and
• a carrier-recombination-center layer formed in said first portion of the semiconductor substrate, wherein the semiconductor substrate includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type laminated on the first semiconductor layer, and an dielectric region isolatately separating the laminated structure of the first and second semiconductor layers into a first island region and a second island region, the first element having the first current path extending in portions of the second and first semiconductor layers which are located in the first island region, the second element having the second current path extending in a portion of the second semiconductor layer which is located in the second island region, and the carrier-recombination-center layer being formed in portions of the first semiconductor layer which are located in a first and second island regions.

The semiconductor integrated circuit device comprising:

• a semiconductor substrate;
• a first element formed in the semiconductor substrate and having a first current path in a first portion of the semiconductor substrate;
• a second element formed in the semiconductor substrate separated from the first element and having a second current path in a second portion of the semiconductor substrate;
• and
• a carrier-recombination-center layer formed in said first portion of the semiconductor substrate, wherein said semiconductor substrate includes a first semiconductor substrate, a first insulating layer formed in the first semiconductor substrate, a second semiconductor substrate formed on the first semiconductor substrate with the first insulating layer interposed therebetween, a trench isolatately separating the second semiconductor substrate into a first island region and a second island region, and a second insulating layer formed in the trench, the first element being formed in the first island region and the second element being formed in the second island region.

A semiconductor integrated circuit device comprising:

• a semiconductor substrate;
• a first element formed in the semiconductor substrate and having a first current path in a first portion of the semiconductor substrate;
• a second element formed in the semiconductor substrate and having a second current path in a second portion of the semiconductor substrate;
• an isolation region formed in a semiconductor substrate which electrically isolates the first and second elements from each other;
• and
• a carrier-recombination-center layer formed in said first portion of the semiconductor substrate, wherein the semiconductor substrate includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type formed on the first semiconductor layer, and an isolating region isolatately separating the second semiconductor layer into a first island region and a second island region, the first element having the first current path extending in the first island region and the first semiconductor layer, the second element having the second current path extending in the second island region, and the carrier-recombination-center layer being formed in the first semiconductor layer.

A semiconductor integrated circuit device comprising:

• a semiconductor substrate;
• a first element formed in the semiconductor substrate and having a first current path in a first portion of the semiconductor substrate;
• a second element formed in the semiconductor substrate and having a second current path and a second portion of the semiconductor substrate;
• an isolation region formed in the semiconductor substrate which electrically isolates the first and second elements from each other;
• and
• a carrier-recombination-center layer formed in said first portion of the semiconductor substrate, wherein the semiconductor substrate includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type laminated on the first semiconductor layer, and an isolation region has a dielectric region isolatately separating the laminated structure of the first and second semiconductor layers into a first island region and a second island region, the first element having the first current path extending in portions of the second and first semiconductor layers which are located in the first island region, the second element having the second current path extending in a portion of the second semiconductor layer which is located in the second island region, and the carrier-recombination-center layer is formed in each of the portions of the first semiconductor layer which are located in the first and second island regions.

A semiconductor integrated circuit device comprising:

• a semiconductor substrate;
• a first element formed in the semiconductor substrate and having a first current path in a first portion of the semiconductor substrate;
• a second element formed in the semiconductor substrate and having a second current path in a second portion of the semiconductor substrate;
• an isolation region formed in the semiconductor substrate and which electrically isolates the first and second elements from each other;
• and
• a carrier-recombination-center layer formed in said first portion of the semiconductor substrate, wherein the semiconductor substrate includes a first semiconductor substrate, a first insulating film formed on the first semiconductor substrate, and a second semiconductor substrate formed on the first semiconductor substrate with the first insulating layer interposed therebetween, the isolating region have a trench isolately separating the second semiconductor substrate into a first island region and a second island region, and a second insulating layer formed in the trench, the first element is formed in the first island region and the first element is formed in the second island region.