Method of making a memory array with field oxide islands eliminated
AssigneeNational Semiconductor Corporation
InventorsGraham Wolstenholme, Albert Bergemont, Etan Shacham
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AssigneeNational Semiconductor Corporation
InventorsGraham Wolstenholme, Albert Bergemont, Etan Shacham
Estimating the term…
A nonvolatile semiconductor memory, which includes an array of programmable transistor cells, such as EPROM or EEPROM cells, provides electrical isolation without the use of field oxide islands. The cells are arranged in X number of rows and Y number of columns with the cells in at least two of the rows being designated as select cells and the remaining cells being designated as memory cells. Control circuitry is provided for causing the select cells to supply programming voltages to selected ones of the memory cells. Alternate ones of the select cells are formed as implanted-channel select cells to provide electrical isolation for adjacent select cells which remain in the low threshold (active) state. The implanted-channel select cells are formed by implanting a material into the channel region of each of the implanted-channel select cells to increase the threshold voltage of the cells, thereby preventing the implanted channel select cells from conducting when normal operational voltages are applied.
A method of forming a memory array that includes a plurality of bit lines formed in a substrate, a plurality of rows of memory cells arranged so that, in each row, one memory cell is formed between each pair of adjacent bit lines, and a plurality of rows of select cells arranged so that, in each row, one select cell is formed between each pair of adjacent bit lines, each row of select cells having alternating first and second select cells, the method comprising the steps of:
A method of forming a memory array that includes a plurality of bit lines formed in a substrate, a plurality of rows of memory cells arranged so that, in each row, one memory cell is formed between each pair of adjacent bit lines, and a plurality of rows of select cells arranged so that, in each row, one select cell is formed between each pair of adjacent bit lines, each row of select cells having alternating first and second select cells, the method comprising the steps of:
Dependencies are inferred from the claim text.