Fabrication process for semiconductor device

A fabrication process for a semiconductor device comprising the steps of:

• forming a projecting core member on a lower electrode layer provided on the surface of an insulation layer on a semiconductor substrate;
• forming outer electrode bodies by alternately forming spacer layers and conductive layers on the outer wall of said core member, and by forming cylindrical electrodes extending from said lower electrode layer from said conductive layers and spacers between said cylindrical electrodes from said spacer layers, by anisotropic etching, said outer electrode bodies forming step including the steps of:
• forming a first spacer layer over said core member and said lower electrode layer;
• performing anisotropic etching for said first spacer layer to leave said first spacer layer only on the vertical side wall of said core member thereby forming a first spacer;
• forming a first conductive layer over said core member, said lower electrode layer and said first spacer;
• forming a second spacer layer over the entire surface of said first conductive layer;
• performing anisotropic etching for said second spacer layer to leave said second spacer layer only on the vertical side wall of said first conductive layer thereby forming a second spacer;
• forming a second conductive layer over the surfaces of said second spacer and said first conductive layer;
• performing anisotropic etching for said first and second conductive layers and said lower electrode layer until said insulation layer is exposed thereby forming a first cylindrical electrode from said first conductive layer and a second cylindrical electrode from said second conductive layer;
• removing said core member;
• forming inner electrode bodies by alternately forming spacer layers and conductive layers on the inner wall of said outer electrode bodies at a portion where said core number is removed, and by forming cylindrical electrodes extending from said lower electrode layer from said conductive layers and spacers between said cylindrical electrodes from said spacer layers, by anisotropic etching, to thereby form a lower electrode with said lower electrode layer, said outer electrode bodies and said inner electrode bodies;
• removing spacers from said outer and inner electrode bodies;
• and
• forming a capacitor insulation layer over the exposed surfaces of said lower electrode including said lower electrode layer and said cylindrical electrodes, and forming an upper electrode over said capacitor insulation layer to form a capacitor.