Multi-chip module packaging system

An integrated circuit packaging system, comprising:

• (a) a substrate for a multi-chip module comprised of a plurality of die mounting locations and a first interconnect pattern programmed to connect together integrated circuits mounted in adjacent die mounting locations;
• (b) at least one logic chip mounted on the substrate at one of the die mounting locations, wherein leads on the logic chip are electrically connected to the first interconnect pattern on the substrate;
• and
• (c) at least one interconnect chip mounted on the substrate at one of the die mounting locations, wherein leads on the interconnect chip are electrically connected to the first interconnect pattern on the substrate, and the interconnect chip comprises a second interconnect pattern for connecting together any two pads on the interconnect chip, so that an electrical connection is provided between the two pads, thereby electrically connecting together logic chips, and wherein the interconnect chip comprises passive elements.

An integrated circuit packaging system, comprising:

• (a) a substrate for a multi-chip module comprised of a plurality of die mounting locations and an interconnect pattern that connects adjacent die mounting locations;
• (b) first and second integrated circuit logic chips mounted on the substrate at first and second ones of the die mounting locations, respectively;
• and
• (c) an interconnect chip mounted on the substrate at a location between the first and second ones of the die mounting locations, the interconnect chip having no active components and electrically connecting the first and second integrated circuit logic chips.