Charge drain for a MIS device
AssigneeSony Corporation
InventorJunya Suzuki
Life of this patent
Estimating the term…
Abstract
A semiconductor device which has a diffusion layer region in a semiconductor body, and a MIS transistor with a gate electrode formed on the semiconductor body that is connected to the diffusion layer region. The semiconductor device is made by the steps of forming a diffusion layer region in the upper layer of the semiconductor body forming a gate electrode on the upper surface of the semiconductor body through a gate insulating film which is connected to the diffusion layer region and forming source and drain regions on the upper layer of the semiconductor body on both sides of the gate electrode so that unnecessary electrical charges on the gate electrode of the MIS transistor and transfer electrodes of the CCD device are removed.
Claims7
A semiconductor device having a MIS structure which comprises a semiconductor body, an insulating layer over a surface of said semiconductor body, and a gate electrode on said insulating layer formed over an active area, said semiconductor device comprising:
- a charge draining region formed on said semiconductor body which has a portion remote from said active area, wherein said gate electrode extends to said portion of said charge draining region and is directly connected thereto so as to drain charges from said gate electrode and a high concentration region formed in an upper layer of said semiconductor body and a conductor with one end connected to ground potential and the other end connected to said high concentration region.
Dependencies are inferred from the claim text.