Contact hole mask for semiconductor fabrication
AssigneeChartered Semiconductor Manufacturing Pte Ltd.
InventorsRon-Fu Chu, Chun H. Yik
Life of this patent
Estimating the term…
Loading patent…
AssigneeChartered Semiconductor Manufacturing Pte Ltd.
InventorsRon-Fu Chu, Chun H. Yik
Estimating the term…
This invention provides an improved process latitude mask for forming contact or via hole openings in a photoresist masking layer in the fabrication of semiconductor integrated circuits. The invention also provides a method of forming contact or via hole openings in a photoresist masking layer using an improved process latitude mask. The improved process latitude mask, called a dot mask, uses an opaque blocking area formed in the center of the primary opening in a projection mask for forming contact or via hole openings in a photoresist layer. The opaque blocking area is equal to or less than the area of the primary opening divided by nine. The opaque blocking area is small enough so that it will not form an image in the photoresist layer. The opaque blocking area modifies the light intensity profile at the photoresist layer in a manner which improves process latitude.
A dot mask for forming improved process latitude images wherein said dot mask is used to form contact hole or via hole openings in a semiconductor integrated circuit element and a single said dot mask is required for the formation of said contact hole or via hole openings, comprising:
A method of forming improved process latitude images, comprising the steps of:
Dependencies are inferred from the claim text.