Nonvolatile memory cell and method of producing the same
AssigneeSharp Kabushiki Kaisha
InventorKatsuji Iguchi
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Abstract
The nonvolatile memory cell of this invention includes a floating gate formed of an ultra-thin polycrystalline silicon film. Since the memory cell includes such an ultra-thin floating gate with a smooth surface, problems occurring in the patterning for the floating gate in conventional memory cells can be solved. In addition, the memory cells of the invention are suitable for device integration. Especially when the floating gate is formed of a polycrystalline silicon film, the device characteristics such as writing speed are remarkably improved.
Claims16
A nonvolatile memory cell comprising:
- a semiconductor substrate
- a source region and a drain region formed in the semiconductor substrate;
- a first insulating film formed on the semiconductor substrate;
- a floating gate formed on the first insulating film, said floating gate having a uniform thickness;
- a second insulating film formed on the floating gate;
- and
- a control gate formed on the second insulating film,
- wherein the floating gate is formed of a polycrystalline silicon film which is obtained by crystallizing an amorphous silicon film, and the floating gate has a uniform thickness of 55 nm or less.
A nonvolatile memory cell comprising:
- a semiconductor substrate;
- a source region and a drain region formed in the semiconductor substrate;
- a first insulating film formed on the semiconductor substrate;
- a floating gate formed on the first insulating film, said floating gate having a uniform thickness;
- a second insulating film formed on the floating gate, the second insulating film being an oxide film;
- and
- a control gate formed on the second insulating film,
- wherein the floating gate is formed of a polycrystalline silicon film which is obtained by crystallizing an amorphous silicon film, and the floating gate has a uniform thickness of 55 nm or less.
A nonvolatile memory cell comprising:
- a semiconductor substrate;
- a source region and a drain region formed in the semiconductor substrate;
- a first insulating film formed on the semiconductor substrate;
- a floating gate formed on the first insulating film, said floating gate having a uniform thickness;
- a second insulating film formed on the floating gate;
- and
- a control gate formed on the second insulating film,
- wherein the floating gate is formed of a polycrystalline silicon film having an impurity concentration of 1.times.10.sup.19 /cm.sup.3 or less, and the floating gate has a uniform thickness of 33 nm or less.
Dependencies are inferred from the claim text.