Semiconductor read only memory device with memory cells implemented by inverted thin film transistors

A semiconductor read only memory device fabricated on a semiconductor bulk substrate, and having a plurality of memory cell blocks each including series combinations of memory cells and switching transistors, each of the memory cell blocks comprising:

• a) a plurality of conductive strips including elongated impurity regions at intervals in surface portions of said semiconductor bulk substrate and semiconductor strips in grooves between said elongated impurity regions, said plurality of conductive strips having respective top surfaces, and providing gate electrodes of said series combinations of memory cells and switching transistors,
• b) a plurality of first insulating films in said grooves for electrically isolating said plurality of conductive strips from one another,
• c) a gate insulating layer covering the top surfaces of said plurality of conductive strips, and
• d) a plurality of semiconductor layers extending over said gate insulating layer and spaced apart from one another, said plurality of semiconductor layers being respectively associated with said series combinations of memory cells and switching transistors for providing channel regions of the memory cells and channel regions of the switching transistors.