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US 5,489,545 AGranted
Method of manufacturing an integrated circuit having a charge coupled device and a MOS transistor
AssigneeKabushiki Kaisha Toshiba
InventorMinoru Taguchi
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Abstract
An integrated circuit comprises a charge coupled device and an MOS transistor. The charge coupled device has a lower and an upper gate electrode on the substrate. The insulating film between the substrate and the electrodes comprises silicon nitride. The insulating film between the electrodes is formed by thermal oxidizing the lower gate electrode using the silicon nitride film as a mask.
Claims4
A method of manufacturing an integrated circuit having a charge coupled device and first and second MOS transistors, comprising:
- a) preparing a semiconductor substrate having a main surface including a first area, a second area and a third area, said second area including a well region for said first MOS transistor, said third area including a well region for said second MOS transistor;
- b) forming an anti-oxidation insulating film over the surface of the first area and the second area;
- c) forming a first silicon layer on the anti-oxidation insulating film of the first area;
- d) forming a second silicon layer on the anti-oxidation insulating film of the second area as a gate electrode of the first MOS transistor;
- e) forming a lower gate electrode of the charge coupled device covered with an oxide film, by thermal oxidizing the first silicon layer;
- f) forming a conductive layer as an upper gate electrode of the charge coupled device continuously over the anti-oxidation insulating film and the oxide film;
- and
- g) after the step f), forming a gate insulating film of the second MOS transistor on the surface of the third area.
5 more elements
Dependencies are inferred from the claim text.