Semiconductor device having a multilevel metallization

A semiconductor device comprising:

• a dielectric isolation substrate including:
• a polysilicon supporter layer having first and second cavities and a flat surface thereof,
• first and second isolation films formed on the first and second cavities respectively, and
• first and second single-crystal silicon islands formed on said first and second isolation films respectively so that said first and second single-crystal silicon islands are electrically isolated from said polysilicon supporter layer by said first and second isolation films, and edge surfaces of said first and second isolation films surround said first and second single-crystal silicon islands;
• first and second insulating films formed on said first and second single-crystal silicon islands respectively, said first and second insulating films having surfaces being higher than the edge surfaces of said first and second isolation insulating films;
• a third insulating film formed on the flat surface of said polysilicon supporter layer, said third insulating film having a surface being higher than the edge surfaces of said first and second isolation films so that first and second grooves are respectively formed over the edge surface of said first and second isolation films;
• a lower conductive layer formed on the first, second and third insulating film extending from the first insulating films to second insulating film;
• a fourth insulating film formed over said lower conductive layer;
• and
• an upper conductive layer formed over said first, second and third insulating films, said upper conductive layer extending from said first insulating film to said third insulating film, and further extending over said lower conductive layer along the said third insulating film laid on said lower conductive layer, and further extending from said third insulating film to said second insulting film.

A semiconductor device comprising:

• a dielectric isolation substrate including:
• a polysilicon supporter layer having first and second cavities and a flat surface thereof,
• first and second isolation films formed on the first and second cavities respectively, and
• first and second single-crystal silicon islands formed on said first and second isolation films respectively so that said first and second single-crystal silicon islands are electrically isolated from said polysilicon supporter layer by said first and second isolation films, and edge surfaces of said first and second isolation films surround said first and second single-crystal silicon islands;
• first and second insulating films formed on said first and second single-crystal silicon islands respectively, said first and second insulating films having surfaces being higher than the edge surfaces of said first and second isolation insulating films;
• a third insulating film formed on the flat surface of said polysilicon supporter layer, said third insulating film having a surface being higher than the edge surfaces of said first and second isolation films so that first and second grooves are respectively formed over the edge surface of said first and second isolation films;
• a lower conductive layer formed on the third insulating film having a portion extending to cross said first or second groove at acute angles,
• a fourth insulating film formed on said lower conductive layer;
• and
• an upper conductive layer formed above said first, second and third insulating films, said upper conductive layer extending from above said first insulating film to above said second insulating film on said fourth insulating film above the portion of said lower conductive layer which crosses said first or second groove.

A semiconductor device comprising:

• a substrate with a surface having a first cavity, a second cavity, a third cavity and a fourth cavity formed therein and spaced apart to form a rectangular arrangement;
• a first isolation film formed on interior surfaces of the first cavity, a second isolation film formed on interior surfaces of the second cavity, a third isolation film formed on interior surfaces of the third cavity, and a fourth isolation film formed on interior surfaces of the fourth cavity, the first, second, third, and fourth isolation films having respective edges which are planar with the surface of the substrate;
• a first single-crystal silicon island formed on the first isolation film thereby filling the first cavity, a second single-crystal silicon island formed on the second isolation film thereby filling the second cavity, a third single-crystal silicon island formed on the third isolation film thereby filling the third cavity, and a fourth single-crystal silicon island formed on the fourth isolation film thereby filling the fourth cavity, wherein the first, second, third and fourth single-crystal silicon islands have respective surfaces which are planar with the surface of the respective isolation film edges and planar with the surface of the substrate, and wherein the first, second, third and fourth single-crystal silicon islands are electrically isolated from the substrate;
• a first insulating film formed on the surface of first single-crystal silicon island, a second insulating film formed on the surface of second single-crystal silicon island, a third insulating film formed on the surface of third single-crystal silicon island, and a fourth insulating film formed on the surface of fourth single-crystal silicon island, the first, second, third and fourth insulating films having a thickness and thereby having an upper surface in a different plane than the surface of the substrate and the edges of the first, second, third and fourth isolation films;
• a fifth insulating film, formed on the surface of the substrate between the first, second, third and fourth cavities, the fifth insulating film having a thickness and thereby having an upper surface in a different plane than the surface of the substrate and the edges of the first, second, third and fourth isolation films, wherein a first groove, a second groove, a third groove and a fourth groove are respectively formed having as lower surfaces thereof the respective edges of the first, second, third and fourth isolation films, the grooves having side walls formed by sides of the fifth insulating film and sides of the first, second, third and fourth insulating films, respectively;
• a first conductive layer having a first portion formed on the fifth insulating film and extending between the first and second cavities and between the third and fourth cavities, the first conductive layer having a second portion extending from the third insulating film to the fourth insulating film, the second portion formed on the third insulating film, the third groove, the fifth insulating film, the fourth groove, and the fourth insulating film;
• a sixth insulting film formed on the first conductive layer and on portions of the first, second, third and fourth insulating films which are not covered by the first conductive layer;
• and
• a second conductive layer formed on the sixth insulating film, and having a first segment which extends parallel to and above the second portion of the first conductive layer separated therefrom by the sixth insulating film, the second conductive layer having second and third segments which extend perpendicular to and above the second portion of the first conductive layer separated therefrom by the sixth insulating film, and the second conductive layer having fourth and fifth segments extending adjacent to one side of opposite end portions of the first segment parallel to the first segment, and in opposite directions away from each other.