US 5,477,413 AGranted

ESD protection structure for P-well technology

AssigneeCypress Semiconductor Corporation

InventorJeffrey T. Watt

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Abstract

An ESD protection structure for p-well technology using nMOS FETs that prevents the lock-on condition normally occurring after one FET of a multi finger structure snaps back. The multifinger structure is contained in a main p-well and channels ESDs of a first polarity from the contact pad to a metal conduit. A resistance is provided between the main p-well and the conduit. Further, the circuit channeling ESDs of a polarity opposite to the first polarity is contained in a second p-well that is distinct from the main p-well. An ESD event causes one of the fingers to snap back. Resulting drain current through that finger generates electron hole pairs in the main p-well by impact ionization. Thus generated holes, traveling to the conduit through the resistance, raise the voltage of the main p-well, and therefore shift the i-v characteristic curves of all the FETs to a point where they no longer exhibit a knee. The absence of a knee prevents the remaining fingers from being locked off by the finger that snapped back. Consequently, all FETs are turned on and ESD protection is provided by all FETs in the main p-well.

Claims19

Dependent claims

A protective circuit adapted for Electrostatic Discharge (ESD) protection of an integrated circuit, the protective circuit electrically connected to a contact pad and to voltage conduits present in the integrated circuit, the protective circuit comprising:

(a) a first ESD protection circuit having a first and a second terminal, the first terminal of the first ESD protection circuit electrically connected to the contact pad, the second terminal of the first ESD protection circuit electrically connected to a first voltage conduit, the first ESD protection circuit adapted for discharging Electrostatic Discharges (ESDs) of a first polarity from the contact pad into the first voltage conduit;
(b) a second ESD protection circuit adapted for discharging ESDs of a second polarity from the contact pad into the first voltage conduit, the second polarity being opposite in sign to the first polarity, the second ESD protection circuit contained in a first p-well that is at a first potential, the second ESD protection circuit having a first and a second terminal, the first terminal of the second ESD protection circuit electrically connected to the contact pad, the second terminal of the second ESD protection circuit electrically connected to the first voltage conduit, the second ESD protection circuit comprising at least a plurality of operative nMOSFET devices, the drains of the operative nMOSFET devices electrically connected to the first terminal of the second ESD protection circuit, the sources and the gates of the operative nMOSFET devices electrically connected to the second terminal of the second ESD protection circuit;
and
(c) a resistor having a first and a second terminal, the first resistor terminal electrically connected to the first voltage conduit, the second resistor terminal electrically connected to the first p-well.

1 more element

(a) a first ESD protection circuit comprising at least a diode is contained in a second p-well, the diode having a first and a second terminal, the first terminal of the diode electrically connected to the contact pad, the second terminal of the diode electrically connected to a first voltage conduit, the first ESD protection circuit adapted for discharging Electrostatic Discharges (ESDs) of a first polarity from the contact pad into the first voltage conduit;
(b) a second ESD protection circuit adapted for discharging ESDs of a second polarity from the contact pad into the first voltage conduit, the second polarity being opposite in sign to the first polarity, the second ESD protection circuit contained in a first p-well that is distinct from the second p-well, the first p-well being at a first potential, the second ESD protection circuit having a first and a second terminal, the first terminal of the second ESD protection circuit electrically connected to the contact pad, the second terminal of the second ESD protection circuit electrically connected to the first voltage conduit, the second ESD protection circuit comprising at least a plurality of operative nMOSFET devices, the drains of the operative nMOSFET devices electrically connected to the first terminal of the second ESD protection circuit, the drains and the gates of the operative nMOSFET devices electrically connected to the second terminal of the second ESD protection circuit voltage;
and
(c) a resistor having a first and a second terminal, the first resistor terminal electrically connected to the first voltage conduit, the second resistor terminal electrically connected to the first p-well, the resistor having a resistance larger than the maximum of the threshold resistances of the operative nMOSFET devices,
wherein an electrical current is caused to flow through the resistor thereby causing the first p-well to be elevated to a second potential that is higher than the first potential, thereby lowering the threshold voltage of each operative nMOSFET device.

2 more elements

Dependencies are inferred from the claim text.