Method for fabricating storage electrode of dynamic random access memory cell

A method for fabricating a DRAM cell, comprising the steps of:

• forming a MOSFET on a silicon substrate;
• forming an insulating layer over said MOSFET;
• etching a portion of said insulating layer to form a contact hole for a storage electrode;
• forming an undoped polysilicon layer over the entire exposed surface of the resulting structure;
• forming a doped polysilicon layer over said undoped polysilicon layer;
• and
• removing portions of said doped polysilicon layer and said undoped polysilicon layer by a patterning process and thereby forming a storage electrode made of two layers, said two layers consisting of said undoped polysilicon layer and said doped polysilicon layer wherein said undoped polysilicon layer has a thickness that corresponds to 40 to 50% of the thickness of said storage electrode, and wherein said doped polysilicon layer has a thickness that corresponds to 60 to 50% of the thickness of said storage electrode.