Method of testing fine pitch surface mount IC packages
AssigneeIntel Corporation
InventorsPraveen Jain, Steve Prough
Life of this patent
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AssigneeIntel Corporation
InventorsPraveen Jain, Steve Prough
Estimating the term…
An electronic package that is tested before the leads of the package are cut and bent into a final shape. The electronic package has a plurality of leads that extend from an outer housing of the package. The package is typically rectangular in shape and has a group of leads extending from each side of the housing. Extending along each group of leads is a strip of dielectric material that is spaced an offset distance from the side of the housing. The package is tested by placing a plurality of corresponding test pins into contact with the leads over their final cut and formed length in an area between the housing and the dielectric strip. The area of contact corresponds to the ends of the final assembled leads, so that the actual impedance of the leads over their final cut and formed length are tested. The dielectric strip provides structural support for the leads during the handling and testing of the package. The leads of the package are part of a lead frame which has four outer die paddle support bars that are also exterior to the package housing. The die paddle support bars have alignment holes, that together with alignment pins of the tester, align the leads with the test pins.
An electronic package, comprising:
An electronic package, comprising:
An electronic package, comprising:
A method for testing an electronic package, comprising the steps of:
Dependencies are inferred from the claim text.