Semiconductor static random access memory structure
AssigneeSony Corporation
InventorIkuo Yoshihara
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Abstract
A pair of load transistors of a flip-flop circuit constituting a memory cell consist of thin film transistors, and channel regions of the pair of load transistors overlap drain regions of the transistors through a gate insulating film. For this reason, a channel length of the load transistor can be sufficiently increased, and a leakage current of the load transistor can be reduced.
Claims1
A semiconductor memory comprising a memory cell having a flip-flop circuit consisting of a pair of driver transistors of a first conductivity type channel and a pair of load transistors of a second conductivity type channel, and a pair of access transistors,
- wherein said pair of load transistors of the second conductivity type channel are formed by semiconductor thin films and gate electrodes of said pair of load transistors of the second conductivity type channel are formed by semiconductor thin films of the second conductivity type and further wherein a dimension in length of the gate electrodes of said pair of load transistors is larger than a dimension in width of the gate electrodes of said pair of load transistors,
- a dimension in width of the gate electrodes of said pair of driver transistors is larger than a dimension in length of the gate electrodes of said pair of driver transistors, and
- the lengths of the gate electrodes of said pair of load transistors extend perpendicular to the lengths of the gate electrodes of said pair of driver transistors.
Dependencies are inferred from the claim text.