Three-dimensional direct-write EEPROM arrays and fabrication methods

A direct-write EEPROM memory array formed in a semiconductor substrate, said memory array comprising:

• a plurality of substantially parallel elongated trenches adjacently formed in the semiconductor substrate;
• a plurality of vertical direct-write EEPROM cells disposed within said plurality of elongated trenches, multiple EEPROM cells being disposed within each of said plurality of elongated trenches, each of said multiple EEPROM cells disposed in each of said plurality of elongated trenches being paired with another of said EEPROM cells disposed in the same elongated trench such that EEPROM cell pairs are disposed in said plurality of elongated trenches, wherein said multiple EEPROM cells in each of said plurality of elongated trenches include a continuous polysilicon structure that functions as a recall gate for said multiple EEPROM cells in said trench, and each EEPROM cell includes an isolated polysilicon structure which functions as a floating gate for the cell;
• a plurality of discrete control gates disposed within said plurality of elongated trenches, each control gate being shared by one of said EEPROM cell-pairs;
• and
• an electrically continuous diffusion structure associated with at least one elongated trench of said plurality of elongated trenches, said electrically continuous diffusion structure comprising either a source node or a drain node for each of at least two EEPROM cells of said multiple EEPROM cells disposed in said at least one elongated trench of said plurality of elongated trenches.