Quick resolving latch
AssigneeHewlett-Packard Company
InventorsGordon W. Motley, Peter J. Meier, Brian C. Miller
Life of this patent
Estimating the term…
Abstract
A CMOS latch circuit having a second feedback inverter and a switching circuit to switch the second feedback inverter out of the circuit when the latch is being loaded. A first circuit implementation uses a single PFET as the switching circuit, and a second circuit implementation incorporates an NFET transistor, in parallel with the PFET. In a third circuit implementation, the switching circuit switches power to and from the second feedback inverter rather than switching the output signal of the inverter to reduce the input capacitance of the latch.
Claims20
A latch circuit for storing data in a digital circuit, said latch circuit comprising:
- a feed-forward inverter circuit;
- a first feedback inverter circuit having an input connected to an output of said feed-forward inverter circuit and having an output connected to an input of said feed-forward inverter circuit;
- control means for connecting an input signal to said input of said feed-forward inverter circuit;
- a second feedback inverter connected in parallel to said first feedback inverter;
- and
- switching means having an input connected to said control means, said switching means connected to switch said second feedback inverter out of said latch circuit when said control means is activated to connect said input signal to said input of said feed-forward inverter circuit.
A latch circuit for storing data in a digital circuit, said latch circuit comprising:
- a feed-forward inverter circuit;
- a first feedback inverter circuit having an input connected to an output of said feed-forward inverter circuit and having an output connected to an input of said feedforward inverter circuit;
- control means for connecting an input signal to said input of said feed-forward inverter circuit;
- a second feedback inverter connected in parallel to said first feedback inverter;
- and
- switching means having an input connected to said control means, said switching means for switching a power supply of said second feedback inverter, wherein electrical power is removed from said second feedback inverter when said control means is activated to connect said input signal to said input of said feed-forward inverter circuit.
A latch circuit for storing data in a digital circuit, said latch circuit comprising:
- a feed-forward inverter circuit;
- a first feedback inverter circuit having an input connected to an output of said feed-forward inverter circuit and having an output connected to an input of said feed-forward inverter circuit;
- control means for connecting an input signal to said input of said feed-forward inverter circuit;
- a second feedback inverter connected in parallel to said first feedback inverter;
- and
- switching means having an input connected to said control means, said switching means connected to switch an output signal of said second feedback inverter out of said latch circuit when said control means is activated to connect said input signal to said input of said feed-forward inverter circuit.
Dependencies are inferred from the claim text.