US 5,453,903 A · Sub-cycle digital distance relay

Abstract

A sub-cycle digital distance relay which uses only the first N/2 samples after a fault to calculate the distance to the fault using a Full Cycle Fourier Algorithm which operates on N samples, where N is the number of samples taken in a cycle of the power signal. The DC offset in the first N/2 samples taken after detection of the fault is cancelled using the N/2+1 sample taken after detection of the fault. The resulting DC adjusted N/2 samples are then multiplied by -1 in order to take advantage of the symmetry of the sine wave of the power signal in estimating the remaining N/2 samples of the first cycle of the power signal after detection of the fault. By so calculating N/2 artificial samples from the first N/2 actual samples taken after the fault, the digital distance relay of the invention can estimate the distance to the fault and thus provide a reliable trip signal in less than one cycle of the power signal. The technique of the invention is used to implement a high-speed tripping mode for use in conjunction with conventional tripping schemes to provide a more reliable tripping signal in a minimum amount of time after the detection of the fault, thereby providing improved fault protection for the power transmission components.

Claims18

Dependent claims

A protective relay apparatus for providing a trip signal to a circuit breaker on a three-phase electrical power transmission line in an AC electrical power transmission system when a fault is detected in a protection zone of the circuit breaker, comprising:

sampling means for providing samples A(1) to A(N) of at least one of voltage and current for each cycle of a power signal on said transmission line;
and
a processor responsive to said samples A(1) to A(N) for determining whether said fault is in said protection zone and hence whether said circuit breaker should be tripped, said processor implementing a full cycle Fourier algorithm which extracts the fundamental power line frequency phasor components from those samples A(1) to A(N) sampled by said sampling means after detection of said fault, said processor comprising means responsive to said sampling means for (1) providing samples A(1) to A(N/2) sampled by said sampling means after detection of said fault to said full cycle Fourier algorithm as samples A(1) to A(N/2), (2) calculating artificial samples A(N/2+1) to A(N) in accordance with the equation:
A(k)=(-1) , A(k-N/2), k=N/2+1 to N, and (3) providing said artificial samples A(N/2+1) to A(N) to said full cycle Fourier algorithm as samples A(N/2+1) to A(N), whereby said processor provides said trip signal to said circuit breaker when said full cycle Fourier algorithm determines from said samples A(1) through A(N/2) and artificial samples A(N/2+1) through A(N) that said fault occurred in said protection zone.

1 more element

A method of digital distance relaying on a three-phase electrical power transmission line in an AC electrical power transmission system, comprising the steps of:

successively sampling a voltage waveform and a current waveform to obtain samples V(1) to V(N) and I(1) to I(N), respectively, for each cycle of a power signal on said transmission line;
electronically detecting the existence of a fault on said transmission line in a background mode from said samples V(1) to V(N) and I(1) to I(N);
upon detection of a fault in said fault detecting step, determining in a fault mode whether said fault is in a protection zone of a circuit breaker of said AC electrical power transmission system by extracting the fundamental power line frequency phasor components from those voltage samples V(1) to V(N) and current samples I(1) to I(N) sampled after detection of said fault in said fault detecting step, comprising the steps of:
providing samples V(1) to V(N/2) and I(1) to I(N/2) sampled after detection of said fault to respective full cycle Fourier algorithms as samples A(1) to A(N/2),
calculating artificial samples V(N/2+1) to V(N) and I (N/2+1) to I(N) in accordance with the equations:
V(k)=(-1) * V(k-N/2) and I(k)=(-1) * I(k-N/2), where k=N/2+1 to N, and
providing said artificial samples V(N/2+1) to V(N) and I(N/2+1) to I(N) to said respective full cycle Fourier algorithms as samples A(N/2+1) to A(N), and
running said respective full cycle Fourier algorithms with said samples A(1) to A(N);
and providing a trip signal to said circuit breaker when
at least one of said respective full cycle Fourier algorithms determine that said fault occurred in said protection zone.

7 more elements

Dependencies are inferred from the claim text.

Sub-cycle digital distance relay

Life of this patent

Sub-cycle digital distance relay

Life of this patent

Abstract

Claims18