AFC circuit for QPSK demodulator

An AFC circuit for a QPSK demodulator comprising:

• means for obtaining quadrature related detection signals by multiplying a modulated input signal with quadrature related local oscillation frequency signals from a quadrature phase local oscillator;
• digital conversion means for converting the detection signals into corresponding digital signals by sampling them with quadrature related clocks which have a frequency two times higher than a symbol rate of the input signal;
• frequency conversion means for converting frequencies through a complex multiplication of multiplying the digital outputs from the frequency conversion means with a frequency conversion carrier;
• frequency error detection means for detecting a frequency error between the quadrature related frequency converted signals using a symbol timing sample value and a symbol intermediate timing sample value in the frequency converted signals;
• first validity determining means for determining whether the frequency error signal is valid or not through a detection of the pattern of the modulated input signal from sample values before and after the symbol timing so as to result a first validity signal;
• second validity determining means for determining whether the frequency error signal is valid or not through a detection of an absolute sample value of the symbol intermediate timing so as to result a second validity signal;
• and
• valid frequency error extracting means for extracting the frequency error signal as a frequency control signal for controlling the oscillation frequency of the local oscillator when the frequency error signal has been proved to be valid by the first and the second validity signals,
• valid frequency error extracting means for extracting the frequency error signal as a frequency control signal for controlling the oscillation frequency of the frequency conversion carrier when the frequency error signal has been proved to be valid by the first and the second validity signals.