US 5,402,371 A · Method of writing data into and erasing the same from semiconductor nonvolatile memory

Abstract

The present invention provides a method of writing data into and erasing it from a semiconductor nonvolatile memory having two diffusion layers formed in a semiconductor substrate, a floating gate formed on a layer between the two diffusion layers, a control gate and a select gate formed on a side portion of the control gate. The method is achieved by applying a potential enabling a channel to be formed between the two diffusion layers to the control gate, applying a potential preventing the channel from being formed therebetween to the select gate, injecting an electric charge into the floating gate without causing current to flow between the diffusion layers and writing data into the semiconductor nonvolatile memory. Thus, when such a method is used, the semiconductor nonvolatile memory can be operated with low energy and the number of times in which the data is reloaded or rewritten can be made greater.

Claims11

Dependent claims

A method of writing data into a semiconductor nonvolatile memory having first and second diffusion regions, a control gate and a floating gate disposed over a first channel region which is located on the first diffusion region, and a select gate disposed over a second channel region which is located between the first channel region and the second diffusion region, said method comprising the steps of:

applying a first potential to the control gate so that the first channel region is inverted;
simultaneously applying a second potential to the select gate so that the second channel region is not inverted;
and
simultaneously applying a third potential to the first diffusion region so that an electric charge is injected from the first diffusion region into the floating gate through the first channel region.

1 more element

A method of writing data into a semiconductor nonvolatile memory having a plurality of word lines, a plurality of bit Lines crossing the word lines, a plurality of select lines being in parallel to the word lines, a plurality of memory cells each one of which has first and second diffusion regions, a control gate, a floating gate disposed over a first channel region which is located on the first diffusion region, and a select gate disposed over a second channel region which is located between the first channel region and the second diffusion region, the first diffusion region being electrically coupled to one of the bit lines, the control gate being electrically coupled to one of the word lines, the select gate being electrically coupled to one of the select lines, said method comprising the steps of:

applying a first potential to a selected one of the word lines so that the first channel regions disposed under the control gates which are electrically coupled to the selected one of the word lines are inverted;
simultaneously applying a second potential to a selected one of the select lines so that the second channel regions disposed under the select gates which are electrically coupled to the selected one of the word lines are not inverted;
simultaneously applying a third potential to a selected one of the bit lines so that an electric charge is injected from the first diffusion region into the floating gate through the first channel region of a selected one of the memory cells which is electrically coupled to the selected bit line and word line;
and
applying a fourth potential to the bit lines except the selected bit line so that an electric charge is prevented from being injected from the first diffusion region into the floating gate through the first channel region of the memory cells which are not electrically coupled to the selected bit line and word line.

2 more elements

Dependencies are inferred from the claim text.

Method of writing data into and erasing the same from semiconductor nonvolatile memory

Life of this patent

Method of writing data into and erasing the same from semiconductor nonvolatile memory

Life of this patent

Abstract

Claims11