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US 5,401,997 AGranted
ESD protection for poly resistor on oxide
AssigneeIntegrated Device Technology, Inc.
InventorChuen-Der Lien
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AssigneeIntegrated Device Technology, Inc.
InventorChuen-Der Lien
Estimating the term…
An improved Electrostatic Discharge (ESD) protection device for use in the electrostatic discharge testing of an integrated circuit (IC). In accordance with the invention, a p-n junction is formed beneath a polysilicon resistor, with a metal oxide layer separating the resistor and the p-n junction. The p-n junction is formed by positioning a semiconductor well having a first polarity between the metal oxide and a semiconductor substrate having a second polarity. The invention reduces the electrostatic potential across the metal oxide layer, which could otherwise result in damage to the metal oxide during ESD testing of the IC. In a preferred embodiment, the invention includes a switch, such as a transistor, between the well and ground, for allowing the well to float freely during normal circuit operation (to reduce noise) and for fixing the well at a fixed potential during ESD testing.
An integrated circuit, comprising:
In an integrated circuit having an n-type semiconductor substrate, a metal oxide layer on the substrate, a polysilicon resistor on a first region of said metal oxide layer, an input-output pad connected to said resistor, and an electrostatic protection device connected to said resistor, an improved electrostatic discharge protection means comprising:
In an integrated circuit having a p-type semiconductor substrate, a metal oxide layer on said substrate, a polysilicon resistor on a first region of said metal oxide layer, an input-output pad connected to said resistor, and an electrostatic discharge protection device connected to said resistor, an improved electrostatic discharge protection means comprising:
Dependencies are inferred from the claim text.