Optically eraseable nonvolatile semiconductor memory
AssigneeSeiko Instruments Inc.
InventorYukihiro Imura
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Abstract
A nonvolatile semiconductor memory is comprised of a semiconductor substrate composed of N-type silicon, a pair of source and drain regions having opposite electroconductivity to that of the semiconductor substrate and being formed in a surface region of the semiconductor substrate in spaced relation to each other to define therebetween a channel region, a gate insulating film formed on the channel region, a floating gate electrode formed on the gate insulating film over the channel region and composed of N-type polysilicon, and an insulating layer formed to cover the floating gate electrode. The floating gate electrode is composed of the N-type polysilicon effective to reduce the thickness of adjacent gate insulating film below 500 .ANG. to thereby significantly micronize the dimension of memory.
Claims10
A nonvolatile semiconductor memory comprising:
- a semiconductor substrate composed of N-type silicon;
- a source region and a drain region having opposite electroconductivity to that of the semiconductor substrate and being formed in a surface region of the semiconductor substrate in spaced relation to each other to define therebetween a channel region;
- a gate insulating film having a thickness less than 500 .ANG. formed on the channel region;
- a floating gate electrode formed on the gate insulating film over the channel region and composed of N-type polysilicon;
- and
- an insulating layer formed to cover the floating gate electrode;
- wherein the floating gate electrode, the gate insulating film and the semiconductor substrate constitute a metal-oxide-semiconductor structure having a threshold voltage value less than -1.1 volts to compensate the potential level shift of the floating gate electrode relative to the semiconductor substrate due to subsidiary injection of electric charge into the floating gate electrode caused by irradiation of rays onto the floating gate electrode.
A nonvolatile semiconductor memory comprising:
- a semiconductor substrate composed of N-type silicon and having a characteristic Fermi energy level;
- source and drain regions having opposite electroconductivity type to that of the semiconductor substrate and being formed in the surface of the semiconductor substrate in spaced relation to each other to define therebetween a channel region;
- a gate insulating film having a thickness less than 500 .ANG. formed on the channel region;
- a floating gate electrode composed of N-type polysilicon formed on the gate insulating film over the channel region, the floating gate electrode being switchable between a charged state in which charge carriers injected from the semiconductor substrate are stored therein and an uncharged state in which charge carriers are not stored therein, and the floating gate electrode having when in the uncharged state a characteristic Fermi energy level which is shifted upwardly relative to that of the semiconductor substrate due to injection of charge carriers from the semiconductor substrate into the floating gate electrode in response to radiation irradiated on the floating gate electrode;
- and
- an insulating film formed over and covering the floating gate electrode;
- wherein the floating gate electrode, the gate insulating film and the semiconductor substrate comprise a metal-oxide-semiconductor structure having a threshold voltage value less than -1.1 volts to compensate the Fermi energy level shift of the floating gate electrode relative to that of the semiconductor substrate caused by irradiation of radiation onto the floating gate electrode to thereby prevent unwanted switching of the floating gate electrode from the uncharged state to the charged state.
Dependencies are inferred from the claim text.