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US 5,399,894 AGranted
Semiconductor device having bipolar transistor and MOS transistor
AssigneeKabushiki Kaisha Toshiba
InventorsTakeo Maeda, Hiroshi Momose, Yukihiro Urakawa, Masataka Matsui
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Abstract
A semiconductor device of the present invention includes a bipolar transistor and MOS transistors which are formed on the same semiconductor substrate. The bipolar transistor is heterojunction transistor having a hetero junction. The hetero-bipolar transistor is a bipolar transistor of double-hetero structure in which a material used for forming the base region thereof has a band gap narrower than a material used for forming the emitter and collector regions thereof.
Claims14
A BiCMOS device comprising:
- a first P-type MOS transistor having a gate connected to an input terminal, having a source connected to a first power terminal, and having a drain;
- a first N-type MOS transistor having a gate connected to said input terminal, having a source connected to a second power terminal, and having a drain;
- a second N-type MOS transistor having a gate connected to said input terminal, having a drain connected to an output terminal, and having a source;
- a third N-type MOS transistor having a gate connected to the drains of said first P-type MOS transistor and said first N-type MOS transistor, having a source connected to said second power terminal, and having a drain connected to the source of said second N-type MOS transistor;
- a first NPN-type bipolar transistor, including a collector connected to said first power terminal, a base connected to the drains of said first P-type MOS transistor and said first N-type MOS transistor, and an emitter connected to said output terminal;
- and
- a second NPN-type bipolar transistor, including a collector connected to said output terminal, a base connected to the source of said second N-type MOS transistor and the drain of said third N-type MOS transistor, and an emitter connected to said second power terminal, wherein at least one of said first NPN-type bipolar transistor and said second NPN-type bipolar transistor comprises a hetero-bipolar transistor having a heterojunction, and said hetero-bipolar transistor includes:
- a semiconductor substrate of a first conductivity type;
- a semiconductor region of a second conductivity type formed on said semiconductor substrate;
- a field oxide film formed on said semiconductor region;
- a first semiconductor layer of the first conductivity type formed in contact with said semiconductor region and formed to lie over said field oxide film;
- and
- a second semiconductor layer of the second conductivity type formed on said first semiconductor layer.
10 more elements
A BiCMOS device comprising:
- a first P-type MOS transistor having a gate connected to an input terminal, having a source connected to a first power terminal, and having a drain;
- a first N-type MOS transistor having a gate connected to said input terminal, having a source connected to a second power terminal, and having a drain;
- a second N-type MOS transistor having a gate connected to said input terminal, having a drain connected to an output terminal, and having a source;
- a third N-type MOS transistor having a gate connected to the drains of said first P-type MOS transistor and said first N-type MOS transistor, having a source connected to said second power terminal, and having a drain connected to the source of said second N-type MOS transistor;
- a first NPN-type bipolar transistor, including a collector connected to said first power terminal, a base connected to the drains of said first P-type MOS transistor and said first N-type MOS transistor, and an emitter connected to said output terminal;
- and
- a second NPN-type, bipolar transistor, including a collector connected to said output terminal, a base connected to the source of said second N-type MOS transistor and the drain of said third N-type MOS transistor, and an emitter connected to said second power terminal, wherein at least one of said first NPN-type bipolar transistor and said second NPN-type bipolar transistor comprises a hetero-bipolar transistor having a heterojunction, and said hetero-bipolar transistor includes:
- a semiconductor substrate of a first conductivity type;
- a semiconductor region of a second conductivity type formed on said semiconductor substrate;
- a field oxide film formed on said semiconductor region;
- a first semiconductor layer of the first conductivity type formed in contact with said semiconductor region and formed to lie over said field oxide film;
- and
- a second semiconductor layer of the second conductivity type formed on said first semiconductor layer, wherein said semiconductor region is a collector region, said first semiconductor layer is a base region, said second semiconductor layer is an emitter region, and a material used for forming said base region has a band gap narrower than a material used for forming said emitter and collector regions.
10 more elements
A semiconductor device comprising:
- a semiconductor chip;
- a plurality of MOS transistors formed on said semiconductor chip;
- and
- a plurality of bipolar transistors formed on said semiconductor chip, wherein each of said bipolar transistors is formed of a hetero-bipolar transistor having a heterojunction, and wherein each of said hetero-bipolar transistors comprises:
- a semiconductor substrate of a first conductivity type,
- a first semiconductor region of a second conductivity type formed on said semiconductor substrate,
- a field oxide film formed on said first semiconductor region,
- a second semiconductor region of the first conductivity type formed in said first semiconductor region, and
- a semiconductor layer of the second conductivity type formed in contact with said second semiconductor region and formed to lie over said field oxide film.
6 more elements
A BiCMOS device comprising:
- a first P-type MOS transistor having a gate connected to an input terminal, having a source connected to a first power terminal, and having a drain;
- a first N-type MOS transistor having a gate connected to said input terminal, having a source connected to a second power terminal, and having a drain;
- a second N-type MOS transistor having a gate connected to said input terminal, having a drain connected to an output terminal, and having a source;
- a third N-type MOS transistor having a gate connected to the drains of said first P-type MOS transistor and said first N-type MOS transistor, having a source connected to said second power terminal, and having a drain connected to the source of said second N-type MOS transistor;
- a first NPN-type bipolar transistor including a collector connected to said first power terminal, a base connected to the drains of said first P-type MOS transistor and said first N-type MOS transistor, and an emitter connected to said output terminal;
- and
- a second NPN-type bipolar transistor including a collector connected to said output terminal, a base connected to the source of said second N-type MOS transistor and the drain of said third N-type MOS transistor, and an emitter connected to said second power terminal, wherein at least one of said first NPN-type bipolar transistor and said second NPN-type bipolar transistor comprises a hetero-bipolar transistor having a heterojunction, and said hetero-bipolar transistor includes:
- a semiconductor substrate of a first conductivity type,
- a first semiconductor region of a second conductivity type formed on said semiconductor substrate,
- a field oxide film formed on said first semiconductor region,
- a second semiconductor region of the first conductivity type formed in said first semiconductor region, and
- a semiconductor layer of the second conductivity type formed in contact with said second semiconductor region and formed to lie over said field oxide film.
9 more elements
A BiCMOS device comprising:
- a first P-type MOS transistor having a gate connected to an input terminal, having a source connected to a first power terminal, and having a drain;
- a first N-type MOS transistor having a gate connected to said input terminal, having a source connected to a second power terminal, and having a drain;
- a second N-type MOS transistor having a gate connected to said input terminal, having a drain connected to an output terminal, and having a source;
- a third N-type MOS transistor having a gate connected to the drains of said first P-type MOS transistor and said first N-type MOS transistor, having a source connected to said second power terminal, and having a drain connected to the source of said second N-type MOS transistor;
- a first NPN-type bipolar transistor including a collector connected to said first power terminal, a base connected to the drains of said first P-type MOS transistor and said first N-type MOS transistor, and an emitter connected to said output terminal;
- and
- a second NPN-type bipolar transistor including a collector connected to said output terminal, a base connected to the source of said second N-type MOS transistor and the drain of said third N-type MOS transistor, and an emitter connected to said second power terminal, wherein at least one of said first NPN-type bipolar transistor and said second NPN-type bipolar transistor comprises a hetero-bipolar transistor having a heterojunction, and said hetero-bipolar transistor includes:
- a semiconductor substrate of a first conductivity type,
- a first semiconductor region of a second conductivity type formed on said semiconductor substrate,
- a field oxide film formed on said first semiconductor region,
- a second semiconductor region of the first conductivity type formed in said first semiconductor region, and
- a semiconductor layer of the second conductivity type formed in contact with said second semiconductor region and formed to lie over said field oxide film, wherein said first semiconductor region is a collector region, said second semiconductor region is a base region, said semiconductor layer is an emitter region, and a material used for forming said base region has a band gap narrower than a material used for forming said emitter and collector regions.
9 more elements
A BiCMOS device comprising:
- an emitter coupled logic (ECL) logic circuit including a plurality of bipolar transistors, each of which is a hetero-bipolar transistor having:
- a semiconductor substrate of a first conductivity type,
- a first semiconductor region of a second conductivity type formed on said semiconductor substrate,
- a field oxide film formed on said semiconductor region,
- a second semiconductor region of the first conductivity type formed in said first semiconductor region, and
- a semiconductor layer of the second conductivity type formed in contact with said second semiconductor region and formed to lie over said field oxide film.
3 more elements
Dependencies are inferred from the claim text.