Mesh geometry for MOS-gated semiconductor devices
AssigneeHarris Corporation
InventorsJohn M. S. Neilson, Carl F. Wheatley, Jr., Frederick P. Jones, Victor A. K. Temple
Life of this patent
Estimating the term…
Abstract
A pattern for a wafer for a MOS-gated semiconductor device includes plural ribbons extending from a source contact region to another source contact region, each of the ribbons having a single source region between two channel regions, so as to increase the device's current-carrying capability per unit area relative to the prior art. The pattern increases the size of the active current-carrying area (the channel and neck regions of the device) relative to the area of the source contact areas. The source contact regions may be discrete or linear, and the ribbons may extend therefrom perpendicularly or at other angles.
Claims24
A wafer for a MOS-gated semiconductor device comprising:
- plural ribbons extending linearly from a source contact region of a first semiconductor type in a surface of the wafer;
- each of said ribbons having a single source region of a second semiconductor type between two channel regions of the first semiconductor type, said two channel regions being connected by a body region of the first semiconductor type interior to the wafer;
- and
- a neck region of the second semiconductor type between each of said ribbons.
A MOS-gated semiconductor device comprising:
- a surface with plural spaced-apart neck regions, each of said neck regions surrounded by a channel region that is surrounded by a source region, each said source region being common with the source regions for adjacent ones of said plural neck regions;
- and
- plural spaced-apart source contact regions placed in predetermined portions of said source regions.
A method of increasing the current-carrying capability of a MOS-gated semiconductor device comprising the steps of:
- extending ribbons from a source contact region of a first semiconductor type in a surface layer of the device, each of said ribbons comprising a single source region of a second semiconductor type between two channel regions of the first semiconductor type connected beneath said source region by a body region of the first semiconductor type;
- and
- forming a neck region of a semiconductor of the second type between each of said ribbons,
- said ribbons being extended and said neck region being formed so as to increase the areal size thereof relative to the areal size of the source contact region to thereby increase the current-carrying capability of the device.
A wafer for a MOS-gated semiconductor device comprising:
- plural ribbons extending generally perpendicular from a linearly extending source contact region of a first semiconductor type in a surface of a wafer;
- each of said ribbons having a single source region of a second semiconductor type between two channel regions of the first semiconductor type that are connected interior to the wafer beneath said source region;
- and
- a neck region of the second semiconductor type between each of said ribbons.
A wafer for a MOS-gated semiconductor device comprising:
- a mesh in a surface of a wafer, said mesh comprising plural ribbons intersecting at nodes of said mesh, and a source contact region of a first semiconductor type in a surface of a wafer at each of said nodes;
- each of said ribbons having a single source region of a second semiconductor type between two channel regions of the first semiconductor type that are connected interior to the wafer beneath said source region;
- and
- a neck region of the second semiconductor type between each of said ribbons.
A method of increasing the current-carrying capability of a MOS-gated semiconductor device comprising the steps of:
- extending plural ribbons generally perpendicularly from a linerarly extended source contact region of a first semiconductor type in a surface layer of the device, each of the ribbons comprising a single source region of a second semiconductor type between two channel regions of the first semiconductor type that are connected beneath the source region;
- and
- forming a neck region of a semiconductor of the second type between each of the ribbons.
A method of increasing the current-carrying capability of a MOS-gated semiconductor device comprising the steps of:
- providing plural ribbons that extend from nodes of a mesh, each of the nodes having a source contact region of a first semiconductor type in a surface layer of the device, each of the ribbons comprising a single source region of a second semiconductor type between two channel regions of the first semiconductor type that are connected beneath the source region;
- and
- forming a neck region of a semiconductor of the second type between each of the ribbons.
Dependencies are inferred from the claim text.