Process for manufacturing integrated circuits with very narrow electrodes
AssigneeThomson-CSF Semiconducteurs Specifiques
InventorPierre Blanchard
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AssigneeThomson-CSF Semiconducteurs Specifiques
InventorPierre Blanchard
Estimating the term…
A method for the manufacture of integrated circuits where it is desired to produce narrow conducting grids separated by a narrow gap and uses the lifting-up of silicon nitride (bird's bill) which is formed during a thick localized oxidation. A localized oxidation step is carried out and the oxide formed is totally removed. The edges (20, 22) of a nitride layer (14) stay overhanging. A conforming polycrystalline-silicon deposition enables silicon to be deposited uniformly, including beneath these edges. Finally, vertical anisotropic etching removes the silicon everywhere except beneath the overhanging edges, so that two silicon lines (28, 30) remain. An ion implantation (34) may be performed between the two lines. The method will find particular application for making anti-dazzle systems for photosensitive charge-coupled devices.
A method for manufacture of an anti-dazzle system for a charge-coupled device, the system having two narrow electrodes that are insulated from a substrate and extend symmetrically on either side of a doped region formed in the substrate and that form a charge removal drain, wherein said method comprises the steps of:
Dependencies are inferred from the claim text.