US 5,397,747 A · Vertical chip mount memory package and method

Abstract

A packaging substrate (10) is populated with memory chip cube(s) (40) and horizontally mounted interconnect chip(s) (19) mounted on the substrate which are joined during assembly using two kinds of lead tin solder alloys to form memory chip cube. One is a high melting point lead tin alloy (HMA), the other is a lower melting point lead tin alloy (LMA). The memory chip pairs (11) of the memory cube are formed by placing functional memory chips over another functional memory chips before they were diced. The chip pads of the individual memory chips and the lead tin pads of the memory chips within the wafer are aligned and the high melting point lead tin solder is reflowed, forming memory chip pairs. The memory cube (42) is formed by joining the memory chip pairs together in a boat (30) with a silicon bar (41) maintaining spacing during manufacture. The memory chip cube (42) as well as the supporting chips are then placed and joined to the packaging substrate. The supporting silicon bar is removed from the memory chip cube (42) by re-heating the cube after it is joined to the packaging substrate. The package is completed by following with capping of the chip package of the paired memory chip cube with its attached packaging substrate by attaching to the base member substrate an appropriate heat sink after appropriate I/O flex lines are in place.

Claims4

Dependent claims

A method of assembling the memory chip cube package, comprising the steps of:

fabricating a memory chip pairs for a cube;
assembling a plurality of memory chip pairs into a memory chip cube;
assembling the memory chip cube as part of a package containing a packaging wiring base substrate having a planar surface and having a plurality of bonding interconnect pads located on its surface, at least one interconnection chip horizontally mounted on said planar surface and disposed horizontally and parallel to the surface with interconnection to selected interconnect pads, said memory chip cube mounted on the planar surface of the base substrate and electrically connected and mechanically bonded to selected interconnect pads located on its surface, said memory chip cube having said memory chip pairs disposed vertically and normal to the surface of said base substrate in close spacing between one another in the form of said memory chip cube mounted on the packaging wiring substrate, and having a plurality of interconnections between said interconnect pads located to interconnect said interconnection chip and said memory chip pairs;
and enclosing said interconnection chips and memory cube by an enclosure covering mounted on said base substrate.

1 more element

Dependencies are inferred from the claim text.

Vertical chip mount memory package and method

Life of this patent

Vertical chip mount memory package and method

Life of this patent

Abstract

Claims4