Antifuse structure and method of fabrication
AssigneeTexas Instruments Incorporated
InventorsKueing-Long Chen, Ashwin H. Shah, David K. Liu
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AssigneeTexas Instruments Incorporated
InventorsKueing-Long Chen, Ashwin H. Shah, David K. Liu
Estimating the term…
An antifuse structure (20) and method of fabrication are provided. A first conductive layer (A) is etched according to a first mask (62a) having a first pattern and according to a second mask (64a) having a second pattern. A first insulative layer (30) is disposed over the first conductive layer (A) and etched according to a third mask (40a) having a third pattern to expose at least one section of the first conductive layer (A). A second insulative layer (26) is disposed adjacent at least one exposed section of the first conductive layer (A). A second conductive layer (1) is disposed over the second insulative layer (26) so that the antifuse structure (20) includes at least one antifuse region (A1) where a section of the second insulative layer (26) is adjacent the first (A) and second (1) conductive layers. The antifuse region (A1) has a sublithographic vertical dimension (t) according to a thickness of the first conductive layer (A). Further, the antifuse region (A1) has a sublithographic horizontal dimension (L) according to an overlap between the first (62a) and second (64a) masks.
A method of fabricating an antifuse structure, comprising the steps of:
A method of fabricating an antifuse structure, comprising the steps of:
Dependencies are inferred from the claim text.