Method of making a DRAM cell with trench capacitor

A method of forming a DRAM cell in a semiconductor substrate of a first polarity, comprising the steps of:

• forming a temporary protective layer on the surface of said substrate;
• etching a trench vertically to a first depth, exposing upper trench sidewalls and a first trench bottom;
• expanding said trench horizontally by substantially isotropic etching of said upper trench sidewalls under said temporary protective layer to form trench collar sidewalls displaced from said upper trench sidewalls by a sidewall offset distance;
• forming a layer of collar dielectric having a thickness substantially equal to said sidewall offset distance on said collar sidewalls and on said first trench bottom;
• removing said collar dielectric from at least said first trench bottom;
• etching said trench further through said first trench bottom to a final trench depth having a final trench bottom and lower trench sidewalls;
• doping said lower trench sidewalls with a sidewall dose of said second polarity;
• forming a trench dielectric on at least said lower trench sidewalls;
• forming an inner electrode within said trench etching said inner electrode and said collar dielectric to a strap depth, thereby exposing a strap contact surface on a portion of said collar sidewalls and an electrode contact surface on the top of said inner electrode;
• forming a conductive strap between said strap contact surface and said inner electrode;
• and
• forming an access transistor having a strap contact electrode abutting said strap contact surface.