US 5,395,779 A · Process of manufacture of split gate EPROM device

Abstract

Fabrication of a MOSFET comprises, forming a dielectric layer on a substrate and a sacrificial structure on portions of the dielectric layer, forming a first polysilicon layer over the sacrificial structure and other exposed surfaces of the device, patterning the first polysilicon layer and the dielectric layer by masking and etching to form a stepped electrode structure partially upon the sacrificial structure and partially upon the other exposed surfaces of the device, applying ion implantation into the substrate outside of the area covered by the stepped electrode structure, removing the sacrificial layer from the surface of the substrate and from beneath the stepped electrode structure leaving an overhanging surface of the stepped electrode structure, forming a second layer of dielectric material on the exposed surfaces of the stepped electrode structure and the substrate, and forming a second polysilicon layer over and under overhanging portions the second layer of dielectric material and the substrate.

Claims15

Dependent claims

A method of fabricating a EPROM device on a semiconductor substrate comprising:

forming a dielectric layer on said substrate,
forming a sacrificial structure on portions of said dielectric layer,
forming a first polysilicon layer over said sacrificial structure and other surfaces of said device,
patterning said first polysilicon layer and said dielectric layer by masking and etching to form a stepped electrode structure partially upon said sacrificial structure and partially upon said other surfaces of said device,
ion implanting into said substrate outside of an area covered by said stepped electrode structure,
removing said sacrificial layer from the surface of said substrate and from beneath said stepped electrode structure leaving an overhanging surface of said stepped electrode structure,
forming a second layer of dielectric material on exposed surfaces of said stepped electrode structure and said substrate, and
forming a second polysilicon layer over and under overhanging portions of said stepped electrode structure and over said second layer of dielectric material and said substrate.

5 more elements

A method of fabricating a EPROM device on a semiconductor substrate comprising:

forming a silicon dioxide gate dielectric layer on said substrate,
forming a silicon nitride sacrificial structure on portions of said dielectric layer,
etching away exposed portions of said gate dielectric layer to expose portions of the surface of said substrate and forming a tunnel oxide layer over exposed surfaces of said substrate,
forming a first polysilicon layer over said sacrificial structure and said tunnel oxide layer,
patterning said first polysilicon layer and said dielectric layer by masking and etching to form a stepped electrode structure partially upon said sacrificial structure and partially upon said tunnel oxide layer,
ion implanting ions into said substrate outside of the area covered by said stepped electrode structure forming buried bit lines in said substrate,
removing said sacrificial layer from the surface of said substrate and from beneath said stepped electrode structure leaving an overhanging surface of said stepped electrode structure,
forming a second layer of dielectric material on exposed surfaces of said stepped electrode structure and said substrate, and
forming a second polysilicon layer over and under overhanging portions of said stepped electrode structure and over said second layer of dielectric material and said substrate.

6 more elements

Dependencies are inferred from the claim text.

Process of manufacture of split gate EPROM device

Life of this patent

Process of manufacture of split gate EPROM device

Life of this patent

Abstract

Claims15