"Bird-beak-less" field isolation method

A method of forming a field oxide isolation region, comprising the steps of:

• forming a first insulating layer over a silicon substrate;
• forming a second insulating layer over said first insulating layer;
• forming a first opening in said second insulating layer;
• forming sidewall spacers on the vertical surfaces of said second insulating layer, within said first opening, to define a second, smaller opening;
• removing a portion of said silicon substrate and said first insulating layer in the region defined by said second, smaller opening, to form an etched region of said silicon substrate;
• implanting oxygen into said silicon substrate in the region defined by said second, smaller opening;
• forming a layer of polycrystalline silicon in and above said etched region of said silicon substrate, over said second insulating layer, and over said sidewall spacers;
• forming a third insulating layer over said layer of polycrystalline silicon;
• forming said field oxide isolation region by heating the resulting structure in an oxidizing ambient;
• and
• removing the remainder of said first, second and third insulating layers, said sidewall spacers and the remainder of said layer of polycrystalline silicon.

A method of forming field effect transistors (FETs) separated by field oxide isolation regions, comprising the steps of:

• forming a first insulating layer over a silicon substrate;
• forming a second insulating layer over said first insulating layer;
• forming a plurality of first openings in said first and second insulating layers;
• forming sidewall spacers on the vertical surfaces of said first and second insulating layers, within said first openings, to define second, smaller openings;
• removing a portion of said silicon substrate in the regions defined by said second, smaller openings, to form etched regions of said silicon substrate;
• removing said sidewall spacers;
• implanting oxygen into said etched regions of said silicon substrate and into the regions of said silicon substrate under the former locations of said sidewall spacers;
• forming a portion of polycrystalline silicon in and above said etched regions of said silicon substrate;
• forming said field oxide isolation regions by heating the resulting structure in an oxidizing ambient;
• removing the remainder of said first and second insulating layers;
• forming a sacrificial oxide layer over the exposed portion of said silicon substrate;
• removing said sacrificial oxide layer;
• forming a gate oxide layer over the exposed portion of said silicon substrate;
• and
• forming said field effect transistors between said field oxide isolation regions, in and over said silicon substrate.