Recessed side-wall poly plugged local oxidation

A method of forming a field oxide isolation region on and in the surface of a silicon substrate, comprising:

• forming a first layer of pad oxide on the surface of said silicon substrate;
• forming a layer of silicon nitride on the surface of said first pad oxide layer;
• patterning said silicon nitride layer and a partial thickness of said first pad oxide layer to form opening for said field oxide isolation region;
• removing said first pad oxide layer in the area defined by said opening to expose a portion of said silicon substrate, and simultaneously forming a cavity by removing a portion of said first pad oxide layer under said silicon nitride layer;
• removing a thickness of said silicon substrate to provide a recessed area in the substrate, to a depth of between about 300 and 1500 Angstroms;
• forming a second pad oxide layer by oxidizing said silicon substrate;
• depositing a layer of polysilicon over the surfaces of said second pad oxide layer and said silicon nitride layer, and inside said cavity;
• forming a polysilicon spacer adjacent to said silicon nitride layer and a polysilicon plug in said cavity by etching said polysilicon layer;
• forming said field oxide isolation region in and on said silicon substrate, by thermal oxidation of said silicon substrate, whereby said polysilicon spacer and said polysilicon plug are consumed;
• removing said silicon nitride layer;
• removing the remainder of said first pad oxide layer;
• forming a sacrificial oxide layer on the surface of said substrate;
• and
• removing said sacrificial oxide layer to complete said field oxide isolation region.

A method of isolating semiconductor devices on a silicon substrate, comprising:

• forming a first layer of pad oxide on the surface of said silicon substrate;
• forming a layer of silicon nitride on the surface of said first pad oxide layer;
• patterning said silicon nitride layer and a partial thickness of said first pad oxide layer to form an opening;
• removing said first pad oxide layer in the area defined by said opening to expose a portion of said silicon substrate, and simultaneously forming a cavity by removing a portion of said first pad oxide layer under said silicon nitride layer;
• forming a second pad oxide layer by oxidizing said exposed portion of said silicon substrate and said first pad oxide layer;
• depositing a layer of polysilicon over the surfaces of said second pad oxide layer and said silicon nitride layer, and inside said cavity;
• forming a polysilicon spacer adjacent to said silicon nitride layer and a polysilicon plug in said cavity by etching said polysilicon layer;
• forming a field oxide isolation region in and on said silicon substrate, by thermal oxidation of said silicon substrate, whereby said polysilicon spacer and said polysilicon plug are consumed, to isolate said semiconductor devices;
• removing said silicon nitride layer;
• removing the remainder of said first pad oxide layer;
• forming a sacrificial oxide layer on the surface of said substrate;
• and
• removing said sacrificial oxide layer to complete said field oxide isolation region.

A method of isolating semiconductor devices on a silicon substrate, comprising:

• forming a first layer of pad oxide on the surface of said silicon substrate;
• forming a layer of silicon nitride on the surface of said first pad oxide layer;
• patterning said silicon nitride layer and a partial thickness of said first pad oxide layer to form an opening;
• removing said first pad oxide layer in the area defined by said opening to expose a portion of said silicon substrate, and simultaneously forming a cavity by removing a portion of said first pad oxide layer under said silicon nitride layer;
• removing a thickness of said silicon substrate, to provide a recessed area in said substrate, to a depth of between about 300 and 1500 Angstroms;
• forming a second pad oxide layer by oxidizing said exposed portion of said silicon substrate;
• depositing a layer of polysilicon over the surfaces of said second pad oxide layer and said silicon nitride layer, and inside said cavity;
• forming a polysilicon spacer adjacent to said silicon nitride layer and a polysilicon plug in said cavity by etching said polysilicon layer;
• forming a field oxide isolation region in and on said silicon substrate, by thermal oxidation of said silicon substrate, whereby said polysilicon spacer and said polysilicon plug are consumed, to isolate said semiconductor devices;
• removing said silicon nitride layer;
• removing the remainder of said first pad oxide layer;
• forming a sacrificial oxide layer on the surface of said substrate;
• and
• removing said sacrificial oxide layer to complete said field oxide isolation region.