Use of double charge implant to improve retrograde process PMOS punch through voltage

Abstract

A semiconductor CMOS device on a silicon substrate doped with an N- dopant is manufactured by a process of forming a mask upon the substrate, forming field oxide structures upon the substrate through the mask, removing the mask, forming a sacrificial layer on the surface of the substrate between the field oxide structures, forming a P-well mask on the substrate for the NMOS portion of the device, implanting dopant ions to form an NMOS retrograde P-well through the P-well mask, performing an NMOS V.sub.T first implant of ions through the P-well mask into selected regions of the the substrate, performing a second V.sub.T implant of ions into the substrate, performing a PMOS punchthrough voltage implant of ions into the substrate, forming doped polysilicon gate structures, and forming doped source/drain regions.

Dependencies are inferred from the claim text.